[Mesa-dev] [PATCH 0/4] i965/vec4: Changes to the offset() helper

[Iago Toral Quiroga]

During the review of the align16/fp64 backend Curro suggested that we
changed the implementation of the offset() helper to match the one in
the FS backend, which, instead of taking an offset in register units
takes a width and also considers the size of the register to compute
a byte offset into the register file.

Besides consistency, the byte offset granularity provides additional
flexibility that will come in handy when we write a simd lowering
pass in the vec4 backend, that will be part of the align16/fp64
implementation.

Patches 1 and 2 change the offset() helper.
Patches 3-4 adapt the rest of the code to that change, which in most cases
simply means passing a fixed width of 8 to the helper for now. Both patches
should be merged before pushing. Patch 3 has been split because it changes the
original behavior in the wat that fp64 code will need it to be according to the
new semantics of the offset() helper. The align16/fp64 series should be rebased
on top of these changes too.

Iago Toral Quiroga (4):
  i965: move subreg_offset to backend_reg
  i965/vec4: make the offset() operate in terms of width and type
  i965/vec4/cse: adapt to changes in offset() helper
  i965/vec4: adapt to changes in the offset() helper

 src/mesa/drivers/dri/i965/brw_ir_fs.h              |  6 ---
 src/mesa/drivers/dri/i965/brw_ir_vec4.h            | 47 ++++++++++++++++++++--
 src/mesa/drivers/dri/i965/brw_shader.h             |  6 +++
 src/mesa/drivers/dri/i965/brw_vec4_cse.cpp         | 19 ++++++---
 .../dri/i965/brw_vec4_dead_code_eliminate.cpp      | 12 +++---
 .../drivers/dri/i965/brw_vec4_live_variables.cpp   |  8 ++--
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp         |  2 +-
 .../drivers/dri/i965/brw_vec4_surface_builder.cpp  | 14 +++----
 src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp         |  2 +-
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp     |  2 +-
 10 files changed, 83 insertions(+), 35 deletions(-)

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2.7.4