[Mesa-dev] [PATCH 1/4] i965: move subreg_offset to backend_reg

[Iago Toral Quiroga]

So we can access it in the vec4 backend to handle byte offsets into
registers.
---
 src/mesa/drivers/dri/i965/brw_ir_fs.h  | 6 ------
 src/mesa/drivers/dri/i965/brw_shader.h | 6 ++++++
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h
index f214483..00fbace 100644
--- a/src/mesa/drivers/dri/i965/brw_ir_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h
@@ -52,12 +52,6 @@ public:
    /** Smear a channel of the reg to all channels. */
    fs_reg &set_smear(unsigned subreg);
 
-   /**
-    * Offset in bytes from the start of the register.  Values up to a
-    * backend_reg::reg_offset unit are valid.
-    */
-   int subreg_offset;
-
    /** Register region horizontal stride */
    uint8_t stride;
 };
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index e61c080..ae23830 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -75,6 +75,12 @@ struct backend_reg : private brw_reg
     */
    uint16_t reg_offset;
 
+   /**
+    * Offset in bytes from the start of the register.  Values up to a
+    * backend_reg::reg_offset unit are valid.
+    */
+   uint16_t subreg_offset;
+
    using brw_reg::type;
    using brw_reg::file;
    using brw_reg::negate;
-- 
2.7.4