[Mesa-dev] [PATCH v2 000/103] i965 Haswell ARB_gpu_shader_fp64 / OpenGL 4.0

Samuel Iglesias Gonsálvez siglesias at igalia.com
Mon Dec 19 08:00:46 UTC 2016


Hello Matt,

We have done most of the suggestions you made to our patches. However,
we have replied to some of your questions/suggestions and we are
waiting for a reply before marking them as R-b or not.

You can clone the new version of the patch series by running this
command:

$ git clone -b i965-fp64-gen7-scalar-vec4-rc3 https://github.com/Igalia
/mesa.git

Below is the list of patches that need a R-b (they are marked as
UNREVIEWED in the branch).

* i965/vec4: implement hardware workaround for align16 double to float
conversion
> 
> 	This always seemed like a really strange hardware bug, and
one
> 	that no one should ever hit.
> 
> 	I'd prefer that, instead of loading an immediate double and
> then
> 	performing a conversion to float, that we just convert the
> 	double to float in the compiler and emit an instruction to
load
> 	that.
> 

  We have done this. Does this change get your R-b?

* i965/vec4: fix optimize predicate for doubles

  We have replied here [0].

* i965/vec4: handle 32 and 64 bit channels in liveness analysis

  It is still unreviewed. Maybe Curro can take a look at it.

* i965/vec4: add a SIMD lowering pass

  Replied here [1].

* i965/vec4: Prevent copy propagation from violating pre-gen8
restrictions

  Replied here [1].

* i965/vec4: run scalarize_df() after spilling

  Replied here [1].

* i965/gen7: expose OpenGL 4.0 on Haswell

  We are currently discussing it with Curro :-)

Thanks!

Sam

[0] https://lists.freedesktop.org/archives/mesa-dev/2016-December/13815
1.html
[1] https://lists.freedesktop.org/archives/mesa-dev/2016-December/13816
0.html
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