[Mesa-dev] [PATCH] Better explain why we are lowering the num_tile_pipes value for TAHITI

Alexandre Demers alexandre.f.demers at gmail.com
Wed Feb 10 14:35:09 UTC 2016


On 2016-02-10 05:14, Marek Olšák wrote:
> On Wed, Feb 10, 2016 at 2:11 AM, Alexandre Demers
> <alexandre.f.demers at gmail.com> wrote:
>> Signed-off-by: Alexandre Demers <alexandre.f.demers at gmail.com>
>> ---
>>   src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 +++--
>>   1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
>> index 49c310c..aab81f9 100644
>> --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
>> +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
>> @@ -405,8 +405,9 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
>>               radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
>>                                    &ws->info.num_tile_pipes);
>>
>> -            /* The kernel returns 12 for some cards for an unknown reason.
>> -             * I thought this was supposed to be a power of two.
>> +            /* Tahiti have a max_tile_pipes of 12 exceptionally. However, we
>> +             * work with power of two, so let's set it to the nearest power of
>> +             * two value.
>>                */
> This is even worse. :) The proper explanation should be:
>
> "num_tiles_pipes" must be equal to the number of pipes (Px) in the
> pipe config field of the GB_TILE_MODE array. Only one card (Tahiti)
> reports a different value (12). Fix it by setting what's in the
> GB_TILE_MODE array (8).
>
> Marek
I agree, sending a new version of the patch with exactly that comment. 
No confusion possible. ;)

Alexandre Demers



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