[Mesa-dev] [PATCH 5/6] gallium/radeon: remove rcs parameter from radeon_winsys::buffer_set_tiling

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

This was needed for DRM < 2.12.0 where the kernel was rewriting tiling flags
in IBs.
---
 src/gallium/drivers/r300/r300_texture.c       | 2 +-
 src/gallium/drivers/radeon/r600_texture.c     | 2 +-
 src/gallium/drivers/radeon/radeon_winsys.h    | 2 --
 src/gallium/winsys/amdgpu/drm/amdgpu_bo.c     | 1 -
 src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 8 --------
 5 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c
index 3631cd1..3f4c662 100644
--- a/src/gallium/drivers/r300/r300_texture.c
+++ b/src/gallium/drivers/r300/r300_texture.c
@@ -1063,7 +1063,7 @@ r300_texture_create_object(struct r300_screen *rscreen,
     tiling.microtile = tex->tex.microtile;
     tiling.macrotile = tex->tex.macrotile[0];
     tiling.stride = tex->tex.stride_in_bytes[0];
-    rws->buffer_set_tiling(tex->buf, NULL, &tiling);
+    rws->buffer_set_tiling(tex->buf, &tiling);
 
     return tex;
 
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 73e1101..e181557 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -252,7 +252,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
 	tiling.stride = surface->level[0].pitch_bytes;
 	tiling.scanout = (surface->flags & RADEON_SURF_SCANOUT) != 0;
 
-	rscreen->ws->buffer_set_tiling(resource->buf, NULL, &tiling);
+	rscreen->ws->buffer_set_tiling(resource->buf, &tiling);
 
 	return rscreen->ws->buffer_get_handle(resource->buf,
 						surface->level[0].pitch_bytes, whandle);
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index c3539c1..572f8ef 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -480,11 +480,9 @@ struct radeon_winsys {
      * Set tiling flags describing a memory layout of a buffer object.
      *
      * \param buf       A winsys buffer object to set the flags for.
-     * \param cs        A command stream to flush if the buffer is referenced by it.
      * \param tiling    Tiling info for display code and DRI sharing.
      */
     void (*buffer_set_tiling)(struct pb_buffer *buf,
-                              struct radeon_winsys_cs *rcs,
                               struct radeon_bo_tiling_info *tiling);
 
     /**
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index 469b702..8282ec9 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
@@ -420,7 +420,6 @@ static void amdgpu_bo_get_tiling(struct pb_buffer *_buf,
 }
 
 static void amdgpu_bo_set_tiling(struct pb_buffer *_buf,
-                                 struct radeon_winsys_cs *rcs,
 				 struct radeon_bo_tiling_info *tiling)
 {
    struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf);
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 2ffa4e7..fd7cba5 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -671,21 +671,13 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf,
 }
 
 static void radeon_bo_set_tiling(struct pb_buffer *_buf,
-                                 struct radeon_winsys_cs *rcs,
 				 struct radeon_bo_tiling_info *tiling)
 {
     struct radeon_bo *bo = radeon_bo(_buf);
-    struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     struct drm_radeon_gem_set_tiling args;
 
     memset(&args, 0, sizeof(args));
 
-    /* Tiling determines how DRM treats the buffer data.
-     * We must flush CS when changing it if the buffer is referenced. */
-    if (cs && radeon_bo_is_referenced_by_cs(cs, bo)) {
-        cs->flush_cs(cs->flush_data, 0, NULL);
-    }
-
     os_wait_until_zero(&bo->num_active_ioctls, PIPE_TIMEOUT_INFINITE);
 
     if (tiling->microtile == RADEON_LAYOUT_TILED)
-- 
2.5.0