[Mesa-dev] [PATCH 1/2] glsl: Fix undefined shifts.

Jordan Justen jordan.l.justen at intel.com
Sat Jan 2 09:11:24 PST 2016


Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

On 2015-12-30 12:26:25, Matt Turner wrote:
> Shifting into the sign bit if undefined, as is shifting by 32.
> ---
>  src/glsl/ir_constant_expression.cpp | 10 +++++-----
>  src/glsl/nir/nir_opcodes.py         |  6 +++---
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/src/glsl/ir_constant_expression.cpp b/src/glsl/ir_constant_expression.cpp
> index 5bf5ce5..cf62f96 100644
> --- a/src/glsl/ir_constant_expression.cpp
> +++ b/src/glsl/ir_constant_expression.cpp
> @@ -1539,10 +1539,10 @@ ir_expression::constant_expression_value(struct hash_table *variable_context)
>              data.i[c] = -1;
>           else {
>              int count = 0;
> -            int top_bit = op[0]->type->base_type == GLSL_TYPE_UINT
> -                          ? 0 : v & (1 << 31);
> +            unsigned top_bit = op[0]->type->base_type == GLSL_TYPE_UINT
> +                               ? 0 : v & (1u << 31);
>  
> -            while (((v & (1 << 31)) == top_bit) && count != 32) {
> +            while (((v & (1u << 31)) == top_bit) && count != 32) {
>                 count++;
>                 v <<= 1;
>              }
> @@ -1628,7 +1628,7 @@ ir_expression::constant_expression_value(struct hash_table *variable_context)
>           else if (offset + bits > 32)
>              data.u[c] = 0; /* Undefined for bitfieldInsert, per spec. */
>           else
> -            data.u[c] = ((1 << bits) - 1) << offset;
> +            data.u[c] = ((1ul << bits) - 1) << offset;
>        }
>        break;
>     }
> @@ -1738,7 +1738,7 @@ ir_expression::constant_expression_value(struct hash_table *variable_context)
>           else if (offset + bits > 32)
>              data.u[c] = 0; /* Undefined, per spec. */
>           else {
> -            unsigned insert_mask = ((1 << bits) - 1) << offset;
> +            unsigned insert_mask = ((1ul << bits) - 1) << offset;
>  
>              unsigned insert = op[1]->value.u[c];
>              insert <<= offset;
> diff --git a/src/glsl/nir/nir_opcodes.py b/src/glsl/nir/nir_opcodes.py
> index 1cd01a4..e8b5123 100644
> --- a/src/glsl/nir/nir_opcodes.py
> +++ b/src/glsl/nir/nir_opcodes.py
> @@ -516,7 +516,7 @@ int offset = src0, bits = src1;
>  if (offset < 0 || bits < 0 || offset + bits > 32)
>     dst = 0; /* undefined per the spec */
>  else
> -   dst = ((1 << bits)- 1) << offset;
> +   dst = ((1ul << bits) - 1) << offset;
>  """)
>  
>  opcode("ldexp", 0, tfloat, [0, 0], [tfloat, tint], "", """
> @@ -578,7 +578,7 @@ if (bits == 0) {
>  } else if (bits < 0 || offset < 0 || offset + bits > 32) {
>     dst = 0; /* undefined per the spec */
>  } else {
> -   dst = (base >> offset) & ((1 << bits) - 1);
> +   dst = (base >> offset) & ((1ul << bits) - 1);
>  }
>  """)
>  opcode("ibitfield_extract", 0, tint,
> @@ -618,7 +618,7 @@ if (bits == 0) {
>  } else if (offset < 0 || bits < 0 || bits + offset > 32) {
>     dst = 0;
>  } else {
> -   unsigned mask = ((1 << bits) - 1) << offset;
> +   unsigned mask = ((1ul << bits) - 1) << offset;
>     dst = (base & ~mask) | ((insert << bits) & mask);
>  }
>  """)
> -- 
> 2.4.9
> 
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