[Mesa-dev] [PATCH 5/6] nvc0/ir: add support for PK2H/UP2H

[Samuel Pitoiset]

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>

On 01/03/2016 01:38 AM, Ilia Mirkin wrote:
> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
> ---
>   .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp |  1 +
>   .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp  |  5 ++++-
>   .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp  | 23 ++++++++++++++++++++++
>   src/gallium/drivers/nouveau/nvc0/nvc0_screen.c     |  2 +-
>   4 files changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
> index e9ddd36..ec74e7a 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
> @@ -740,6 +740,7 @@ CodeEmitterGM107::emitF2F()
>      emitCC   (0x2f);
>      emitField(0x2d, 1, (insn->op == OP_NEG) || insn->src(0).mod.neg());
>      emitFMZ  (0x2c, 1);
> +   emitField(0x29, 1, insn->subOp);
>      emitRND  (0x27, rnd, 0x2a);
>      emitField(0x0a, 2, util_logbase2(typeSizeof(insn->sType)));
>      emitField(0x08, 2, util_logbase2(typeSizeof(insn->dType)));
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> index 1d4f0d9..0b28047 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> @@ -1030,7 +1030,10 @@ CodeEmitterNVC0::emitCVT(Instruction *i)
>
>         // for 8/16 source types, the byte/word is in subOp. word 1 is
>         // represented as 2.
> -      code[1] |= i->subOp << 0x17;
> +      if (!isFloatType(i->sType))
> +         code[1] |= i->subOp << 0x17;
> +      else
> +         code[1] |= i->subOp << 0x18;
>
>         if (sat)
>            code[0] |= 0x20;
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> index beb67fe..e0b9435 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> @@ -319,6 +319,10 @@ unsigned int Instruction::srcMask(unsigned int s) const
>            x |= 2;
>         return x;
>      }
> +   case TGSI_OPCODE_PK2H:
> +      return 0x3;
> +   case TGSI_OPCODE_UP2H:
> +      return 0x1;
>      default:
>         break;
>      }
> @@ -452,6 +456,7 @@ nv50_ir::DataType Instruction::inferSrcType() const
>      case TGSI_OPCODE_ATOMUMAX:
>      case TGSI_OPCODE_UBFE:
>      case TGSI_OPCODE_UMSB:
> +   case TGSI_OPCODE_UP2H:
>         return nv50_ir::TYPE_U32;
>      case TGSI_OPCODE_I2F:
>      case TGSI_OPCODE_I2D:
> @@ -516,10 +521,12 @@ nv50_ir::DataType Instruction::inferDstType() const
>      case TGSI_OPCODE_DSGE:
>      case TGSI_OPCODE_DSLT:
>      case TGSI_OPCODE_DSNE:
> +   case TGSI_OPCODE_PK2H:
>         return nv50_ir::TYPE_U32;
>      case TGSI_OPCODE_I2F:
>      case TGSI_OPCODE_U2F:
>      case TGSI_OPCODE_D2F:
> +   case TGSI_OPCODE_UP2H:
>         return nv50_ir::TYPE_F32;
>      case TGSI_OPCODE_I2D:
>      case TGSI_OPCODE_U2D:
> @@ -2807,6 +2814,22 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>         FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>            mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c));
>         break;
> +   case TGSI_OPCODE_PK2H:
> +      val0 = getScratch();
> +      val1 = getScratch();
> +      mkCvt(OP_CVT, TYPE_F16, val0, TYPE_F32, fetchSrc(0, 0));
> +      mkCvt(OP_CVT, TYPE_F16, val1, TYPE_F32, fetchSrc(0, 1));
> +      mkOp3(OP_INSBF, TYPE_U32, dst0[0], val1, mkImm(0x1010), val0);
> +      break;
> +   case TGSI_OPCODE_UP2H:
> +      src0 = fetchSrc(0, 0);
> +      if (dst0[0])
> +         mkCvt(OP_CVT, TYPE_F32, dst0[0], TYPE_F16, src0);
> +      if (dst0[1]) {
> +         geni = mkCvt(OP_CVT, TYPE_F32, dst0[1], TYPE_F16, src0);
> +         geni->subOp = 1;
> +      }
> +      break;
>      case TGSI_OPCODE_EMIT:
>         /* export the saved viewport index */
>         if (viewport != NULL) {
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index 58b712e..43f6164 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -197,6 +197,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
>      case PIPE_CAP_DRAW_PARAMETERS:
>      case PIPE_CAP_MULTI_DRAW_INDIRECT:
>      case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
> +   case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
>         return 1;
>      case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
>         return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
> @@ -219,7 +220,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
>      case PIPE_CAP_VERTEXID_NOBASE:
>      case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
>      case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
> -   case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
>         return 0;
>
>      case PIPE_CAP_VENDOR_ID:
>