[Mesa-dev] [PATCH 02/23] radeonsi: determine SPI_SHADER_Z_FORMAT outside of shader compilation

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_shader.c        | 7 -------
 src/gallium/drivers/radeonsi/si_shader.h        | 1 -
 src/gallium/drivers/radeonsi/si_state_shaders.c | 7 ++++++-
 3 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 4b49f9d..b7c44b9 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2247,13 +2247,6 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base)
 		    si_shader_ctx->screen->b.family != CHIP_OLAND)
 			mask |= 0x1;
 
-		if (samplemask_index >= 0)
-			si_shader_ctx->shader->spi_shader_z_format = V_028710_SPI_SHADER_32_ABGR;
-		else if (stencil_index >= 0)
-			si_shader_ctx->shader->spi_shader_z_format = V_028710_SPI_SHADER_32_GR;
-		else
-			si_shader_ctx->shader->spi_shader_z_format = V_028710_SPI_SHADER_32_R;
-
 		/* Specify which components to enable */
 		args[0] = lp_build_const_int32(base->gallivm, mask);
 
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 067704f..3d14c79 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -278,7 +278,6 @@ struct si_shader {
 	unsigned			float_mode;
 	unsigned			scratch_bytes_per_wave;
 	unsigned			spi_shader_col_format;
-	unsigned			spi_shader_z_format;
 	unsigned			cb_shader_mask;
 	union si_shader_key		key;
 
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 41e331b..61db8ef 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -431,7 +431,12 @@ static void si_shader_ps(struct si_shader *shader)
 	si_pm4_set_reg(pm4, R_0286E0_SPI_BARYC_CNTL, spi_baryc_cntl);
 	si_pm4_set_reg(pm4, R_0286D8_SPI_PS_IN_CONTROL, spi_ps_in_control);
 
-	si_pm4_set_reg(pm4, R_028710_SPI_SHADER_Z_FORMAT, shader->spi_shader_z_format);
+	si_pm4_set_reg(pm4, R_028710_SPI_SHADER_Z_FORMAT,
+		       info->writes_samplemask ? V_028710_SPI_SHADER_32_ABGR :
+		       info->writes_stencil ? V_028710_SPI_SHADER_32_GR :
+		       info->writes_z ? V_028710_SPI_SHADER_32_R :
+		       V_028710_SPI_SHADER_ZERO);
+
 	si_pm4_set_reg(pm4, R_028714_SPI_SHADER_COL_FORMAT,
 		       shader->spi_shader_col_format);
 	si_pm4_set_reg(pm4, R_02823C_CB_SHADER_MASK, shader->cb_shader_mask);
-- 
2.1.4