[Mesa-dev] [PATCH 3/3] svga: add DXGenMips command support
Brian Paul
brianp at vmware.com
Tue Jan 12 06:56:51 PST 2016
Looks good. Just nit-picks below.
On 01/11/2016 07:31 PM, Charmaine Lee wrote:
> For those formats that support hw mipmap generation, use the
> DXGenMips command. Otherwise fallback to the mipmap generation utility.
>
> Tested with piglit, OpenGL apps (Heaven, Turbine, Cinebench)
> ---
> src/gallium/drivers/svga/svga_cmd.h | 4 ++
> src/gallium/drivers/svga/svga_cmd_vgpu10.c | 21 +++++++++
> src/gallium/drivers/svga/svga_format.c | 53 +++++++++++++----------
> src/gallium/drivers/svga/svga_format.h | 7 +++
> src/gallium/drivers/svga/svga_resource.c | 6 +++
> src/gallium/drivers/svga/svga_resource_texture.c | 54 ++++++++++++++++++++++++
> src/gallium/drivers/svga/svga_resource_texture.h | 8 +++-
> src/gallium/drivers/svga/svga_sampler_view.h | 5 +++
> src/gallium/drivers/svga/svga_screen.c | 3 ++
> src/gallium/drivers/svga/svga_state_sampler.c | 2 +-
> 10 files changed, 138 insertions(+), 25 deletions(-)
>
> diff --git a/src/gallium/drivers/svga/svga_cmd.h b/src/gallium/drivers/svga/svga_cmd.h
> index 271ee8e..26e4690 100644
> --- a/src/gallium/drivers/svga/svga_cmd.h
> +++ b/src/gallium/drivers/svga/svga_cmd.h
> @@ -638,4 +638,8 @@ SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context *swc,
> const SVGA3dBox *box,
> unsigned subResource);
>
> +enum pipe_error
> +SVGA3D_vgpu10_GenMips(struct svga_winsys_context *swc,
> + const SVGA3dShaderResourceViewId shaderResourceViewId,
> + struct svga_winsys_surface *view);
> #endif /* __SVGA3D_H__ */
> diff --git a/src/gallium/drivers/svga/svga_cmd_vgpu10.c b/src/gallium/drivers/svga/svga_cmd_vgpu10.c
> index 4cd9d5b..0c07b26 100644
> --- a/src/gallium/drivers/svga/svga_cmd_vgpu10.c
> +++ b/src/gallium/drivers/svga/svga_cmd_vgpu10.c
> @@ -1293,3 +1293,24 @@ SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context *swc,
> swc->commit(swc);
> return PIPE_OK;
> }
> +
> +enum pipe_error
> +SVGA3D_vgpu10_GenMips(struct svga_winsys_context *swc,
> + SVGA3dShaderResourceViewId shaderResourceViewId,
> + struct svga_winsys_surface *view)
> +{
> + SVGA3dCmdDXGenMips *cmd;
> +
> + cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_GENMIPS,
> + sizeof(SVGA3dCmdDXGenMips), 1);
> +
> + if (!cmd)
> + return PIPE_ERROR_OUT_OF_MEMORY;
> +
> + swc->surface_relocation(swc, &cmd->shaderResourceViewId, NULL, view,
> + SVGA_RELOC_READ);
I'd have to do some digging to see if it matters here, but mipmap
generation could be considered a read/write operation since we're
modifying the surface contents.
> + cmd->shaderResourceViewId = shaderResourceViewId;
> +
> + swc->commit(swc);
> + return PIPE_OK;
> +}
> diff --git a/src/gallium/drivers/svga/svga_format.c b/src/gallium/drivers/svga/svga_format.c
> index 2b549df..0186736 100644
> --- a/src/gallium/drivers/svga/svga_format.c
> +++ b/src/gallium/drivers/svga/svga_format.c
> @@ -48,16 +48,16 @@ static const struct vgpu10_format_entry format_conversion_table[] =
> {
> /* Gallium format SVGA3D vertex format SVGA3D pixel format Flags */
> { PIPE_FORMAT_NONE, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> - { PIPE_FORMAT_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, 0 },
> - { PIPE_FORMAT_B8G8R8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, 0 },
> + { PIPE_FORMAT_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, TF_GEN_MIPS },
> + { PIPE_FORMAT_B8G8R8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, TF_GEN_MIPS },
> { PIPE_FORMAT_A8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_X8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> - { PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, 0 },
> + { PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS },
> { PIPE_FORMAT_B4G4R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> - { PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, 0 },
> - { PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, 0 },
> + { PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
> + { PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS },
> { PIPE_FORMAT_L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> - { PIPE_FORMAT_A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, 0 },
> + { PIPE_FORMAT_A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, TF_GEN_MIPS },
> { PIPE_FORMAT_I8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_L8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> @@ -75,10 +75,10 @@ static const struct vgpu10_format_entry format_conversion_table[] =
> { PIPE_FORMAT_R64G64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_R64G64B64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_R64G64B64A64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> - { PIPE_FORMAT_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, 0 },
> - { PIPE_FORMAT_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, 0 },
> - { PIPE_FORMAT_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, 0 },
> - { PIPE_FORMAT_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, 0 },
> + { PIPE_FORMAT_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, TF_GEN_MIPS },
> + { PIPE_FORMAT_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, TF_GEN_MIPS },
> + { PIPE_FORMAT_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, TF_GEN_MIPS },
> + { PIPE_FORMAT_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, TF_GEN_MIPS },
> { PIPE_FORMAT_R32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_R32G32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_R32G32B32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> @@ -95,10 +95,10 @@ static const struct vgpu10_format_entry format_conversion_table[] =
> { PIPE_FORMAT_R32G32_SSCALED, SVGA3D_R32G32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
> { PIPE_FORMAT_R32G32B32_SSCALED, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
> { PIPE_FORMAT_R32G32B32A32_SSCALED, SVGA3D_R32G32B32A32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
> - { PIPE_FORMAT_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, 0 },
> - { PIPE_FORMAT_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, 0 },
> + { PIPE_FORMAT_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, TF_GEN_MIPS },
> + { PIPE_FORMAT_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, TF_GEN_MIPS },
> { PIPE_FORMAT_R16G16B16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
> - { PIPE_FORMAT_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, 0 },
> + { PIPE_FORMAT_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, TF_GEN_MIPS },
> { PIPE_FORMAT_R16_USCALED, SVGA3D_R16_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
> { PIPE_FORMAT_R16G16_USCALED, SVGA3D_R16G16_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
> { PIPE_FORMAT_R16G16B16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST },
> @@ -111,10 +111,10 @@ static const struct vgpu10_format_entry format_conversion_table[] =
> { PIPE_FORMAT_R16G16_SSCALED, SVGA3D_R16G16_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
> { PIPE_FORMAT_R16G16B16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST },
> { PIPE_FORMAT_R16G16B16A16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST },
> - { PIPE_FORMAT_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, 0 },
> - { PIPE_FORMAT_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, 0 },
> + { PIPE_FORMAT_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS },
> + { PIPE_FORMAT_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, TF_GEN_MIPS },
> { PIPE_FORMAT_R8G8B8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
> - { PIPE_FORMAT_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, 0 },
> + { PIPE_FORMAT_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, TF_GEN_MIPS },
> { PIPE_FORMAT_X8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_R8_USCALED, SVGA3D_R8_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
> { PIPE_FORMAT_R8G8_USCALED, SVGA3D_R8G8_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST },
> @@ -138,20 +138,20 @@ static const struct vgpu10_format_entry format_conversion_table[] =
> { PIPE_FORMAT_R32G32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_R32G32B32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_R32G32B32A32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> - { PIPE_FORMAT_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, 0 },
> - { PIPE_FORMAT_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, 0 },
> + { PIPE_FORMAT_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, TF_GEN_MIPS },
> + { PIPE_FORMAT_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, TF_GEN_MIPS },
> { PIPE_FORMAT_R16G16B16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 },
> - { PIPE_FORMAT_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, 0 },
> + { PIPE_FORMAT_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, TF_GEN_MIPS },
> { PIPE_FORMAT_L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_L8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_A8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_X8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> - { PIPE_FORMAT_B8G8R8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, 0 },
> - { PIPE_FORMAT_B8G8R8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, 0 },
> + { PIPE_FORMAT_B8G8R8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, TF_GEN_MIPS },
> + { PIPE_FORMAT_B8G8R8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, TF_GEN_MIPS },
> { PIPE_FORMAT_A8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_X8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> - { PIPE_FORMAT_R8G8B8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, 0 },
> + { PIPE_FORMAT_R8G8B8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, TF_GEN_MIPS },
> { PIPE_FORMAT_DXT1_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, 0 },
> { PIPE_FORMAT_DXT1_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, 0 },
> { PIPE_FORMAT_DXT3_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM, 0 },
> @@ -171,7 +171,7 @@ static const struct vgpu10_format_entry format_conversion_table[] =
> { PIPE_FORMAT_A8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_B5G5R5X1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> { PIPE_FORMAT_R10G10B10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED },
> - { PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, 0 },
> + { PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS },
> { PIPE_FORMAT_R9G9B9E5_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, 0 },
> { PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT_S8X24_UINT, 0 },
> { PIPE_FORMAT_R1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
> @@ -1967,6 +1967,13 @@ svga_format_is_integer(SVGA3dSurfaceFormat format)
> }
> }
>
> +boolean
> +svga_format_support_gen_mips(enum pipe_format format)
> +{
> + assert(format < Elements(format_conversion_table));
> + return ((format_conversion_table[format].flags & TF_GEN_MIPS) > 0);
> +}
> +
>
> /**
> * Given a texture format, return the expected data type returned from
> diff --git a/src/gallium/drivers/svga/svga_format.h b/src/gallium/drivers/svga/svga_format.h
> index 9f9a530..8f06a4d 100644
> --- a/src/gallium/drivers/svga/svga_format.h
> +++ b/src/gallium/drivers/svga/svga_format.h
> @@ -52,6 +52,10 @@ struct svga_screen;
> #define VF_PUINT_TO_USCALED (1 << 6) /* 10_10_10_2 to uscaled */
> #define VF_PUINT_TO_SSCALED (1 << 7) /* 10_10_10_2 to sscaled */
>
> +/**
> + * Texture format flags.
> + */
> +#define TF_GEN_MIPS (1 << 8) /* supports hw generate mipmap */
>
> void
> svga_translate_vertex_format_vgpu10(enum pipe_format format,
> @@ -80,6 +84,9 @@ svga_format_name(SVGA3dSurfaceFormat format);
> boolean
> svga_format_is_integer(SVGA3dSurfaceFormat format);
>
> +boolean
> +svga_format_support_gen_mips(enum pipe_format format);
> +
> enum tgsi_return_type
> svga_get_texture_datatype(enum pipe_format format);
>
> diff --git a/src/gallium/drivers/svga/svga_resource.c b/src/gallium/drivers/svga/svga_resource.c
> index a910ae0..1c3bcd6 100644
> --- a/src/gallium/drivers/svga/svga_resource.c
> +++ b/src/gallium/drivers/svga/svga_resource.c
> @@ -107,6 +107,12 @@ svga_init_resource_functions(struct svga_context *svga)
> svga->pipe.transfer_flush_region = u_transfer_flush_region_vtbl;
> svga->pipe.transfer_unmap = u_transfer_unmap_vtbl;
> svga->pipe.transfer_inline_write = u_transfer_inline_write_vtbl;
> +
> + if (svga_have_vgpu10(svga)) {
> + svga->pipe.generate_mipmap = svga_texture_generate_mipmap;
> + } else {
> + svga->pipe.generate_mipmap = NULL;
> + }
> }
>
> void
> diff --git a/src/gallium/drivers/svga/svga_resource_texture.c b/src/gallium/drivers/svga/svga_resource_texture.c
> index 4c7aeff..ecbf356 100644
> --- a/src/gallium/drivers/svga/svga_resource_texture.c
> +++ b/src/gallium/drivers/svga/svga_resource_texture.c
> @@ -993,3 +993,57 @@ svga_texture_from_handle(struct pipe_screen *screen,
>
> return &tex->b.b;
> }
> +
> +boolean
> +svga_texture_generate_mipmap(struct pipe_context *pipe,
> + struct pipe_resource *pt,
> + unsigned base_level,
> + unsigned last_level,
> + unsigned first_layer,
> + unsigned last_layer)
> +{
> + struct pipe_sampler_view templ, *psv;
> + struct svga_pipe_sampler_view *sv;
> + struct svga_context *svga = svga_context(pipe);
> + enum pipe_error ret;
> + struct svga_winsys_surface *handle;
> +
> + assert(svga_have_vgpu10(svga));
> +
> + /* Only support 2D texture for now */
> + if (pt->target != PIPE_TEXTURE_2D)
> + return FALSE;
> +
> + /* Fallback to the mipmap generation utility for those formats that
> + * do not support hw generate mipmap
> + */
> + if (!svga_format_support_gen_mips(pt->format))
> + return FALSE;
> +
> + templ.format = pt->format;
> + templ.u.tex.first_layer = first_layer;
> + templ.u.tex.last_layer = last_layer;
> + templ.u.tex.first_level = base_level;
> + templ.u.tex.last_level = last_level;
> +
> + psv = pipe->create_sampler_view(pipe, pt, &templ);
> + if (psv == NULL)
> + return FALSE;
> +
> + sv = (struct svga_pipe_sampler_view *)psv;
We have a svga_pipe_sampler_view() cast wrapper that could be used there:
sv = svga_pipe_sampler_view(psv);
> + svga_validate_pipe_sampler_view(svga, sv);
> + handle = svga_texture(sv->base.texture)->handle;
> +
> + assert(handle);
Let's also do an 'if (!handle) return FALSE' here just to be safe.
> +
> + ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, handle);
> + if (ret != PIPE_OK) {
> + svga_context_flush(svga, NULL);
> + ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, handle);
> + }
> + pipe_sampler_view_reference(&psv, NULL);
> +
> + svga->hud.num_generate_mipmap++;
> +
> + return TRUE;
> +}
> diff --git a/src/gallium/drivers/svga/svga_resource_texture.h b/src/gallium/drivers/svga/svga_resource_texture.h
> index 0326907..66b33e9 100644
> --- a/src/gallium/drivers/svga/svga_resource_texture.h
> +++ b/src/gallium/drivers/svga/svga_resource_texture.h
> @@ -217,7 +217,13 @@ svga_texture_from_handle(struct pipe_screen * screen,
> const struct pipe_resource *template,
> struct winsys_handle *whandle);
>
> -
> +boolean
> +svga_texture_generate_mipmap(struct pipe_context *pipe,
> + struct pipe_resource *pt,
> + unsigned base_level,
> + unsigned last_level,
> + unsigned first_layer,
> + unsigned last_layer);
>
>
> #endif /* SVGA_TEXTURE_H */
> diff --git a/src/gallium/drivers/svga/svga_sampler_view.h b/src/gallium/drivers/svga/svga_sampler_view.h
> index 4ca7fb7..9a243f0 100644
> --- a/src/gallium/drivers/svga/svga_sampler_view.h
> +++ b/src/gallium/drivers/svga/svga_sampler_view.h
> @@ -102,4 +102,9 @@ boolean
> svga_check_sampler_view_resource_collision(struct svga_context *svga,
> struct svga_winsys_surface *res,
> unsigned shader);
> +
> +enum pipe_error
> +svga_validate_pipe_sampler_view(struct svga_context *svga,
> + struct svga_pipe_sampler_view *sv);
> +
> #endif
> diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c
> index 8b724b6..f3ed2df 100644
> --- a/src/gallium/drivers/svga/svga_screen.c
> +++ b/src/gallium/drivers/svga/svga_screen.c
> @@ -319,6 +319,9 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
> case PIPE_CAP_PRIMITIVE_RESTART:
> return 1; /* may be a sw fallback, depending on restart index */
>
> + case PIPE_CAP_GENERATE_MIPMAP:
> + return sws->have_vgpu10;
> +
> /* Unsupported features */
> case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
> case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
> diff --git a/src/gallium/drivers/svga/svga_state_sampler.c b/src/gallium/drivers/svga/svga_state_sampler.c
> index b070f65..e7b540c 100644
> --- a/src/gallium/drivers/svga/svga_state_sampler.c
> +++ b/src/gallium/drivers/svga/svga_state_sampler.c
> @@ -90,7 +90,7 @@ svga_check_sampler_view_resource_collision(struct svga_context *svga,
> * Create a DX ShaderResourceSamplerView for the given pipe_sampler_view,
> * if needed.
> */
> -static enum pipe_error
> +enum pipe_error
> svga_validate_pipe_sampler_view(struct svga_context *svga,
> struct svga_pipe_sampler_view *sv)
> {
>
For patch 2 and 3,
Reviewed-by: Brian Paul <brianp at vmware.com>
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