[Mesa-dev] [Bug 93686] Performance improvement ?=:=?UTF-8?Q? Please consider hardware ɢᴘᴜ rendering in llvmpipe

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=93686

--- Comment #23 from Jan Vesely <jan.vesely at rutgers.edu> ---
(In reply to ytrezq from comment #16)
> (In reply to Alex Deucher from comment #13)
> > I can't speak for intel, but on AMD APUs, while the GPU appears as a device
> > on the PCIE bus, it actually has a much faster internal connection to the
> > memory controller.
> 
> For simplifying let’s pick up the comparison of 2 virtual machines :
> 
> each one is well parametrized so they none of them can fill the ram, even if
> they are alone (ex :max use 4Gb of ʀᴀᴍ and 64Gb available on the host).
> 
> Does the first virtual machine can read the ʀᴀᴍ of the second ? No !
> Does the second virtual machine can read the ʀᴀᴍ of the first ? Neither !
> In both case they share the same memory hardware.
> 
> The same apply to ɢᴘᴜs with ᴄᴘᴜs on ᴀᴘᴜs but with the hypervisor ᴏꜱ  being
> replaced by a pure hardware one, so there’s no software parts (with the
> exception of the memory allocated memory ratio being controllable in the
> ʙɪᴏꜱ  or the ᴜᴇꜰɪ firmware)

the comparison with VMs is wrong, and the information about APUs is also wrong.

AMD APUs have complete access to the entire physical memory of the system. they
use both coherent and non-coherent links which are faster (higher bw + lower
latency) than PCIe lanes. see [0] if you want to learn more about APU memory
(it's a bit dated so the numbers are different for latest products).

coherent memory access allows you to avoid synchronization overhead (or pay it
on every access). the reason to mention APUs is that the difference between
"GPU memory" and coherent system ram is much smaller than dGPUs. the reason to
mention HSA is because they implement this approach wrt. compute; agents with
different capabilities sharing coherent view of the memory.


[0] http://developer.amd.com/wordpress/media/2013/06/1004_final.pdf

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