[Mesa-dev] [PATCH] radeonsi: Add option for SI scheduler
eocallaghan at alterapraxis.com
eocallaghan at alterapraxis.com
Thu Jan 21 10:10:38 PST 2016
Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
On 2016-01-22 04:35, Axel Davy wrote:
> Add a debug option to select the LLVM SI Machine Scheduler.
> R600_DEBUG=sisched
>
> Signed-off-by: Axel Davy <axel.davy at ens.fr>
> ---
> The corresponding llvm patch is on llvm master,
> and should land soon for 3.8 branch
> src/gallium/drivers/radeon/r600_pipe_common.c | 1 +
> src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
> src/gallium/drivers/radeonsi/si_pipe.c | 6 +++++-
> 3 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
> b/src/gallium/drivers/radeon/r600_pipe_common.c
> index e926f56..a9ce7b1 100644
> --- a/src/gallium/drivers/radeon/r600_pipe_common.c
> +++ b/src/gallium/drivers/radeon/r600_pipe_common.c
> @@ -389,6 +389,7 @@ static const struct debug_named_value
> common_debug_options[] = {
> { "nodcc", DBG_NO_DCC, "Disable DCC." },
> { "nodccclear", DBG_NO_DCC_CLEAR, "Disable DCC fast clear." },
> { "norbplus", DBG_NO_RB_PLUS, "Disable RB+ on Stoney." },
> + { "sisched", DBG_SI_SCHED, "Enable LLVM SI Machine Instruction
> Scheduler." },
>
> DEBUG_NAMED_VALUE_END /* must be last */
> };
> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h
> b/src/gallium/drivers/radeon/r600_pipe_common.h
> index 27f6e98..3020421 100644
> --- a/src/gallium/drivers/radeon/r600_pipe_common.h
> +++ b/src/gallium/drivers/radeon/r600_pipe_common.h
> @@ -87,6 +87,7 @@
> #define DBG_NO_DCC (1llu << 43)
> #define DBG_NO_DCC_CLEAR (1llu << 44)
> #define DBG_NO_RB_PLUS (1llu << 45)
> +#define DBG_SI_SCHED (1llu << 46)
>
> #define R600_MAP_BUFFER_ALIGNMENT 64
>
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
> b/src/gallium/drivers/radeonsi/si_pipe.c
> index f6ff4a8..51bcba7 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -215,7 +215,11 @@ static struct pipe_context
> *si_create_context(struct pipe_screen *screen,
> r600_target = radeon_llvm_get_r600_target(triple);
> sctx->tm = LLVMCreateTargetMachine(r600_target, triple,
> r600_get_llvm_processor_name(sscreen->b.family),
> - "+DumpCode,+vgpr-spilling",
> +#if HAVE_LLVM >= 0x0308
> + sscreen->b.debug_flags & DBG_SI_SCHED ?
> + "+DumpCode,+vgpr-spilling,+si-scheduler" :
> +#endif
> + "+DumpCode,+vgpr-spilling",
> LLVMCodeGenLevelDefault,
> LLVMRelocDefault,
> LLVMCodeModelDefault);
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