[Mesa-dev] [PATCH v2 14/35] i965/blorp: Move intratile offset calculations out of surface state setup

[Jason Ekstrand]

Previously we multiplied full x/y offsets, resolved tile aligned buffer
offset and intra tile offset based on that.  Now we let ISL to take into
account the msaa setting and we only multiply the resolved intra tile
offsets.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.c        | 24 ++++++++++++------------
 src/mesa/drivers/dri/i965/brw_blorp.h        | 15 ++-------------
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp |  8 ++++----
 3 files changed, 18 insertions(+), 29 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 48755fc..8f7690c 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -66,9 +66,6 @@ brw_blorp_surface_info_init(struct brw_context *brw,
    info->width = minify(mt->physical_width0, level - mt->first_level);
    info->height = minify(mt->physical_height0, level - mt->first_level);
 
-   intel_miptree_get_image_offset(mt, level, layer,
-                                  &info->x_offset, &info->y_offset);
-
    info->swizzle = SWIZZLE_XYZW;
 
    if (format == MESA_FORMAT_NONE)
@@ -110,6 +107,15 @@ brw_blorp_surface_info_init(struct brw_context *brw,
       break;
    }
    }
+
+   uint32_t x_offset, y_offset;
+   intel_miptree_get_image_offset(mt, level, layer, &x_offset, &y_offset);
+
+   uint8_t bs = isl_format_get_layout(info->brw_surfaceformat)->bpb / 8;
+   isl_tiling_get_intratile_offset_el(&brw->isl_dev, info->surf.tiling, bs,
+                                      info->surf.row_pitch, x_offset, y_offset,
+                                      &info->bo_offset,
+                                      &info->tile_x_sa, &info->tile_y_sa);
 }
 
 
@@ -296,13 +302,6 @@ brw_blorp_emit_surface_state(struct brw_context *brw,
                                   ISL_SURF_USAGE_TEXTURE_BIT,
    };
 
-   uint32_t offset, tile_x, tile_y;
-   isl_tiling_get_intratile_offset_el(&brw->isl_dev, surf.tiling,
-                                      isl_format_get_layout(view.format)->bpb / 8,
-                                      surf.row_pitch,
-                                      surface->x_offset, surface->y_offset,
-                                      &offset, &tile_x, &tile_y);
-
    uint32_t surf_offset;
    uint32_t *dw = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
                                   ss_info.num_dwords * 4, ss_info.ss_align,
@@ -311,11 +310,12 @@ brw_blorp_emit_surface_state(struct brw_context *brw,
    const uint32_t mocs = is_render_target ? ss_info.rb_mocs : ss_info.tex_mocs;
 
    isl_surf_fill_state(&brw->isl_dev, dw, .surf = &surf, .view = &view,
-                       .address = surface->mt->bo->offset64 + offset,
+                       .address = surface->mt->bo->offset64 + surface->bo_offset,
                        .aux_surf = aux_surf, .aux_usage = surface->aux_usage,
                        .aux_address = aux_offset,
                        .mocs = mocs, .clear_color = clear_color,
-                       .x_offset_sa = tile_x, .y_offset_sa = tile_y);
+                       .x_offset_sa = surface->tile_x_sa,
+                       .y_offset_sa = surface->tile_y_sa);
 
    /* Emit relocation to surface contents */
    drm_intel_bo_emit_reloc(brw->batch.bo,
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 7aa67be..e591f41 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -104,19 +104,8 @@ struct brw_blorp_surface_info
     */
    uint32_t height;
 
-   /**
-    * X offset within the surface to texture from (or render to).  For
-    * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
-    * pixels.
-    */
-   uint32_t x_offset;
-
-   /**
-    * Y offset within the surface to texture from (or render to).  For
-    * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
-    * pixels.
-    */
-   uint32_t y_offset;
+   uint32_t bo_offset;
+   uint32_t tile_x_sa, tile_y_sa;
 
    /**
     * Format that should be used when setting up the surface state for this
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 03e4984..fc0aada 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -1899,8 +1899,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
       params.y1 = ALIGN(params.y1, y_align) / 2;
       params.dst.width = ALIGN(params.dst.width, x_align) * 2;
       params.dst.height = ALIGN(params.dst.height, y_align) / 2;
-      params.dst.x_offset *= 2;
-      params.dst.y_offset /= 2;
+      params.dst.tile_x_sa *= 2;
+      params.dst.tile_y_sa /= 2;
       wm_prog_key.use_kill = true;
    }
 
@@ -1924,8 +1924,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
       const unsigned x_align = 8, y_align = params.src.surf.samples != 0 ? 8 : 4;
       params.src.width = ALIGN(params.src.width, x_align) * 2;
       params.src.height = ALIGN(params.src.height, y_align) / 2;
-      params.src.x_offset *= 2;
-      params.src.y_offset /= 2;
+      params.src.tile_x_sa *= 2;
+      params.src.tile_y_sa /= 2;
    }
 
    /* tex_samples and rt_samples are the sample counts that are set up in
-- 
2.5.0.400.gff86faf