[Mesa-dev] [PATCH 4/4] radeonsi: force non-displayable tiling based on surface dimensions

Marek Olšák maraeo at gmail.com
Fri Jun 3 10:52:14 UTC 2016


From: Marek Olšák <marek.olsak at amd.com>

Simply ignore the "scanout" flag if the surface dimensions are unlikely
to be used by DCE.

This enables DCC for all X pixmaps that are not on the list of displayable
dimensions.

Also ignore the "scanout" flag for non-2D, non-color, and AA surfaces.

Any suggestions how to reduce the size of the list?
---
 src/gallium/drivers/radeon/Makefile.sources      |   1 +
 src/gallium/drivers/radeon/display_resolutions.h | 239 +++++++++++++++++++++++
 src/gallium/drivers/radeon/r600_texture.c        |  33 +++-
 3 files changed, 270 insertions(+), 3 deletions(-)
 create mode 100644 src/gallium/drivers/radeon/display_resolutions.h

diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources
index 6fbed81..01bf07d 100644
--- a/src/gallium/drivers/radeon/Makefile.sources
+++ b/src/gallium/drivers/radeon/Makefile.sources
@@ -1,5 +1,6 @@
 C_SOURCES := \
 	cayman_msaa.c \
+	display_resolutions.h \
 	r600_buffer_common.c \
 	r600_cs.h \
 	r600d_common.h \
diff --git a/src/gallium/drivers/radeon/display_resolutions.h b/src/gallium/drivers/radeon/display_resolutions.h
new file mode 100644
index 0000000..5f9bdce
--- /dev/null
+++ b/src/gallium/drivers/radeon/display_resolutions.h
@@ -0,0 +1,239 @@
+/*
+ * Copyright 2016 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* Surface dimensions not listed here will always use a NON-DISPLAYABLE layout
+ * and possibly DCC.
+ *
+ * Add all possible display resolutions and cursor sizes here.
+ */
+
+/* From Wikipedia mostly: */
+static unsigned resolutions[] = {
+	16, 16,
+	32, 32,
+	40, 30,
+	42, 11,
+	42, 32,
+	48, 32,
+	60, 40,
+	64, 64,
+	72, 64,
+	75, 64,
+	84, 48,
+	96, 64,
+	96, 65,
+	96, 96,
+	102, 64,
+	120, 90,
+	128, 36,
+	128, 48,
+	128, 96,
+	128, 128,
+	140, 192,
+	144, 168,
+	150, 40,
+	160, 102,
+	160, 120,
+	160, 144,
+	160, 152,
+	160, 160,
+	160, 200,
+	160, 256,
+	176, 144,
+	208, 176,
+	208, 208,
+	220, 176,
+	224, 144,
+	240, 64,
+	240, 160,
+	240, 240,
+	256, 192,
+	256, 256,
+	272, 340,
+	280, 192,
+	310, 576,
+	312, 390,
+	320, 192,
+	320, 200,
+	320, 208,
+	320, 224,
+	320, 240,
+	320, 256,
+	320, 320,
+	352, 240,
+	352, 288,
+	352, 480,
+	352, 576,
+	370, 576,
+	376, 240,
+	380, 480,
+	384, 288,
+	400, 240,
+	400, 270,
+	400, 300,
+	416, 352,
+	432, 128,
+	432, 240,
+	440, 480,
+	480, 234,
+	480, 250,
+	480, 272,
+	480, 320,
+	480, 480,
+	480, 500,
+	480, 576,
+	512, 256,
+	512, 342,
+	512, 384,
+	520, 432,
+	520, 576,
+	530, 480,
+	544, 576,
+	560, 192,
+	570, 576,
+	580, 480,
+	600, 480,
+	640, 200,
+	640, 240,
+	640, 256,
+	640, 320,
+	640, 350,
+	640, 360,
+	640, 400,
+	640, 480,
+	640, 512,
+	704, 480,
+	704, 576,
+	720, 348,
+	720, 350,
+	720, 364,
+	720, 480,
+	720, 486,
+	720, 576,
+	768, 480,
+	768, 576,
+	800, 240,
+	800, 352,
+	800, 480,
+	800, 600,
+	832, 624,
+	848, 480,
+	852, 480,
+	854, 480,
+	960, 540,
+	960, 544,
+	960, 640,
+	960, 720,
+	1024, 576,
+	1024, 600,
+	1024, 640,
+	1024, 768,
+	1024, 800,
+	1024, 1024,
+	1120, 832,
+	1136, 640,
+	1152, 720,
+	1152, 768,
+	1152, 864,
+	1152, 900,
+	1280, 720,
+	1280, 768,
+	1280, 800,
+	1280, 854,
+	1280, 960,
+	1280, 1024,
+	1280, 1080,
+	1334, 750,
+	1366, 768,
+	1400, 1050,
+	1408, 1152,
+	1440, 900,
+	1440, 960,
+	1440, 1024,
+	1440, 1080,
+	1600, 768,
+	1600, 900,
+	1600, 1024,
+	1600, 1200,
+	1600, 1280,
+	1680, 1050,
+	1776, 1000,
+	1792, 1344,
+	1800, 1440,
+	1828, 1332,
+	1856, 1392,
+	1920, 1080,
+	1920, 1200,
+	1920, 1280,
+	1920, 1400,
+	1920, 1440,
+	1998, 1080,
+	2048, 858,
+	2048, 1152,
+	2048, 1280,
+	2048, 1536,
+	2048, 1556,
+	2160, 1440,
+	2304, 1440,
+	2304, 1728,
+	2538, 1080,
+	2560, 1080,
+	2560, 1440,
+	2560, 1600,
+	2560, 1700,
+	2560, 1800,
+	2560, 1920,
+	2560, 2048,
+	2732, 2048,
+	2736, 1824,
+	2800, 2100,
+	2880, 1800,
+	2880, 900,
+	3000, 2000,
+	3200, 1800,
+	3200, 2048,
+	3200, 2400,
+	3440, 1440,
+	3656, 2664,
+	3840, 2160,
+	3840, 2400,
+	3996, 2160,
+	4096, 1714,
+	4096, 2160,
+	4096, 2304,
+	4096, 3072,
+	4096, 3112,
+	5120, 2160,
+	5120, 2880,
+	5120, 3200,
+	5120, 4096,
+	5616, 4096,
+	6144, 3160,
+	6400, 4096,
+	6400, 4800,
+	7680, 4320,
+	7680, 4800,
+	8192, 4608,
+	8192, 8192,
+	28000, 9334,
+};
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 920cc21..ac9bc7f 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -202,6 +202,31 @@ static unsigned r600_texture_get_offset(struct r600_texture *rtex, unsigned leve
 	       box->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
 }
 
+static bool r600_is_really_scanout(const struct radeon_surf *surf)
+{
+#include "display_resolutions.h"
+
+	unsigned w = surf->npix_x;
+	unsigned h = surf->npix_y;
+	unsigned i;
+
+	if (surf->nsamples > 1 ||
+	    surf->array_size > 1 ||
+	    surf->last_level > 0 ||
+	    surf->flags & RADEON_SURF_Z_OR_SBUFFER)
+		return false;
+
+	/* Set the scanout flag for possible display resolutions only. */
+	for (i = 0; i < ARRAY_SIZE(resolutions); i += 2) {
+		/* Check both normal and rotated dimensions. */
+		if ((w == resolutions[i] && h == resolutions[i+1]) ||
+		    (h == resolutions[i] && w == resolutions[i+1]))
+			return true;
+	}
+
+	return false;
+}
+
 static int r600_init_surface(struct r600_common_screen *rscreen,
 			     struct radeon_surf *surface,
 			     const struct pipe_resource *ptex,
@@ -266,9 +291,6 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
 	default:
 		return -EINVAL;
 	}
-	if (ptex->bind & PIPE_BIND_SCANOUT) {
-		surface->flags |= RADEON_SURF_SCANOUT;
-	}
 
 	if (!is_flushed_depth && is_depth) {
 		surface->flags |= RADEON_SURF_ZBUFFER;
@@ -281,6 +303,11 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
 	if (rscreen->chip_class >= SI) {
 		surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
 	}
+
+	if (ptex->bind & PIPE_BIND_SCANOUT &&
+	    r600_is_really_scanout(surface)) {
+		surface->flags |= RADEON_SURF_SCANOUT;
+	}
 	return 0;
 }
 
-- 
2.7.4



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