[Mesa-dev] [PATCH 2/4] gallium/radeon: don't discard DCC if an external user can write to it

[Bas Nieuwenhuizen]

On Mon, Jun 6, 2016 at 4:21 PM, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
> On 06.06.2016 16:16, Nicolai Hähnle wrote:
>>
>> Patches 1 & 2:
>>
>> Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
>
>
> Hold off on patch #2 - how does this work together with shader image writes?
> Then we're in an ugly situation where the other process could write to DCC,
> but we still need to decompress while the texture is bound as a shader
> image? That doesn't sound good to me...

Does this ever happen anyway? If we have an external writer and this
process writes (due to binding it for image write) then at least one
process did an export with write usage which should disable DCC. So I
don't think we can ever get in this situation.

- Bas

> Nicolai
>
>
>>
>> On 03.06.2016 12:52, Marek Olšák wrote:
>>>
>>> From: Marek Olšák <marek.olsak at amd.com>
>>>
>>> We don't import textures with DCC now, but soon we will.
>>> ---
>>>   src/gallium/drivers/radeon/r600_pipe_common.h |  2 +-
>>>   src/gallium/drivers/radeon/r600_texture.c     | 31
>>> +++++++++++++++++++--------
>>>   2 files changed, 23 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h
>>> b/src/gallium/drivers/radeon/r600_pipe_common.h
>>> index 8072833..2d60da4 100644
>>> --- a/src/gallium/drivers/radeon/r600_pipe_common.h
>>> +++ b/src/gallium/drivers/radeon/r600_pipe_common.h
>>> @@ -676,7 +676,7 @@ void evergreen_do_fast_color_clear(struct
>>> r600_common_context *rctx,
>>>                      struct r600_atom *fb_state,
>>>                      unsigned *buffers, unsigned *dirty_cbufs,
>>>                      const union pipe_color_union *color);
>>> -void r600_texture_disable_dcc(struct r600_common_screen *rscreen,
>>> +bool r600_texture_disable_dcc(struct r600_common_screen *rscreen,
>>>                     struct r600_texture *rtex);
>>>   void r600_init_screen_texture_functions(struct r600_common_screen
>>> *rscreen);
>>>   void r600_init_context_texture_functions(struct r600_common_context
>>> *rctx);
>>> diff --git a/src/gallium/drivers/radeon/r600_texture.c
>>> b/src/gallium/drivers/radeon/r600_texture.c
>>> index 71758c4..0f5c08f 100644
>>> --- a/src/gallium/drivers/radeon/r600_texture.c
>>> +++ b/src/gallium/drivers/radeon/r600_texture.c
>>> @@ -32,7 +32,7 @@
>>>   #include <errno.h>
>>>   #include <inttypes.h>
>>>
>>> -static void r600_texture_discard_dcc(struct r600_common_screen *rscreen,
>>> +static bool r600_texture_discard_dcc(struct r600_common_screen *rscreen,
>>>                        struct r600_texture *rtex);
>>>   static void r600_texture_discard_cmask(struct r600_common_screen
>>> *rscreen,
>>>                          struct r600_texture *rtex);
>>> @@ -86,7 +86,8 @@ bool r600_prepare_for_dma_blit(struct
>>> r600_common_context *rctx,
>>>                                 src_box->height, src_box->depth))
>>>               return false;
>>>
>>> -        r600_texture_discard_dcc(rctx->screen, rdst);
>>> +        if (!r600_texture_discard_dcc(rctx->screen, rdst))
>>> +            return false;
>>>       }
>>>
>>>       /* CMASK as:
>>> @@ -376,25 +377,37 @@ static void r600_texture_discard_cmask(struct
>>> r600_common_screen *rscreen,
>>>       p_atomic_inc(&rscreen->compressed_colortex_counter);
>>>   }
>>>
>>> -static void r600_texture_discard_dcc(struct r600_common_screen *rscreen,
>>> +static bool r600_can_disable_dcc(struct r600_texture *rtex)
>>> +{
>>> +    /* We can't disable DCC if it can be written by another process. */
>>> +    return rtex->dcc_offset &&
>>> +           (!rtex->resource.is_shared ||
>>> +        !(rtex->resource.external_usage & PIPE_HANDLE_USAGE_WRITE));
>>> +}
>>> +
>>> +static bool r600_texture_discard_dcc(struct r600_common_screen *rscreen,
>>>                        struct r600_texture *rtex)
>>>   {
>>> +    if (!r600_can_disable_dcc(rtex))
>>> +        return false;
>>> +
>>>       /* Disable DCC. */
>>>       rtex->dcc_offset = 0;
>>>       rtex->cb_color_info &= ~VI_S_028C70_DCC_ENABLE(1);
>>>
>>>       /* Notify all contexts about the change. */
>>>       r600_dirty_all_framebuffer_states(rscreen);
>>> +    return true;
>>>   }
>>>
>>> -void r600_texture_disable_dcc(struct r600_common_screen *rscreen,
>>> +bool r600_texture_disable_dcc(struct r600_common_screen *rscreen,
>>>                     struct r600_texture *rtex)
>>>   {
>>>       struct r600_common_context *rctx =
>>>           (struct r600_common_context *)rscreen->aux_context;
>>>
>>> -    if (!rtex->dcc_offset)
>>> -        return;
>>> +    if (!r600_can_disable_dcc(rtex))
>>> +        return false;
>>>
>>>       /* Decompress DCC. */
>>>       pipe_mutex_lock(rscreen->aux_context_lock);
>>> @@ -402,7 +415,7 @@ void r600_texture_disable_dcc(struct
>>> r600_common_screen *rscreen,
>>>       rctx->b.flush(&rctx->b, NULL, 0);
>>>       pipe_mutex_unlock(rscreen->aux_context_lock);
>>>
>>> -    r600_texture_discard_dcc(rscreen, rtex);
>>> +    return r600_texture_discard_dcc(rscreen, rtex);
>>>   }
>>>
>>>   static void r600_degrade_tile_mode_to_linear(struct
>>> r600_common_context *rctx,
>>> @@ -497,8 +510,8 @@ static boolean r600_texture_get_handle(struct
>>> pipe_screen* screen,
>>>            * access.
>>>            */
>>>           if (usage & PIPE_HANDLE_USAGE_WRITE && rtex->dcc_offset) {
>>> -            r600_texture_disable_dcc(rscreen, rtex);
>>> -            update_metadata = true;
>>> +            if (r600_texture_disable_dcc(rscreen, rtex))
>>> +                update_metadata = true;
>>>           }
>>>
>>>           if (!(usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH) &&
>>>
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