[Mesa-dev] [PATCH 12/18] i965: add indirect packing support to gs load inputs

[Timothy Arceri]

---
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 95d5802..2890f74 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -2135,14 +2135,26 @@ fs_visitor::emit_gs_input_load(const fs_reg &dst,
       } else {
          /* Indirect indexing - use per-slot offsets as well. */
          const fs_reg srcs[] = { icp_handle, indirect_offset };
+         unsigned read_components = num_components + first_component;
+         fs_reg tmp = bld.vgrf(dst.type, read_components);
          fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, 2);
          bld.LOAD_PAYLOAD(payload, srcs, ARRAY_SIZE(srcs), 0);
-
-         inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp_dst, payload);
+         if (first_component != 0) {
+            inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp,
+                            payload);
+            inst->regs_written = read_components;
+            for (unsigned i = 0; i < num_components; i++) {
+               bld.MOV(offset(tmp_dst, bld, i),
+                       offset(tmp, bld, i + first_component));
+            }
+         } else {
+            inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp_dst,
+                         payload);
+            inst->regs_written = num_components * type_sz(tmp_dst.type) / 4;
+         }
          inst->offset = base_offset;
          inst->base_mrf = -1;
          inst->mlen = 2;
-         inst->regs_written = num_components * type_sz(tmp_dst.type) / 4;
       }
 
       if (type_sz(dst.type) == 8) {
-- 
2.5.5