[Mesa-dev] [PATCH 1/1] r600: Enable FMA on chips that support it

[Jan Vesely]

On Thu, 2016-06-16 at 00:47 +0200, Glenn Kennard wrote:
> On Wed, 15 Jun 2016 20:13:13 +0200, Jan Vesely <jan.vesely at rutgers.ed
> u> wrote:
> 
> > 
> > Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
> > ---
> > Untested (I don't have the required hw)
> > 
> >  src/gallium/drivers/r600/r600_pipe.c   | 5 ++++-
> >  src/gallium/drivers/r600/r600_shader.c | 2 +-
> >  2 files changed, 5 insertions(+), 2 deletions(-)
> > 
> > diff --git a/src/gallium/drivers/r600/r600_pipe.c
> > b/src/gallium/drivers/r600/r600_pipe.c
> > index a49b00f..49c3e1d 100644
> > --- a/src/gallium/drivers/r600/r600_pipe.c
> > +++ b/src/gallium/drivers/r600/r600_pipe.c
> > @@ -548,7 +548,6 @@ static int r600_get_shader_param(struct
> > pipe_screen* pscreen, unsigned shader, e
> >  		return 0;
> >  	case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> >  	case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> > -	case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> >  	case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> >  	case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> >  		return 0;
> > @@ -558,6 +557,10 @@ static int r600_get_shader_param(struct
> > pipe_screen* pscreen, unsigned shader, e
> >  		 *    https://bugs.freedesktop.org/show_bug.cgi?id
> > =86720
> >  		 */
> >  		return 255;
> > +	case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> > +		// Enable on CYPRESS(EG) and CAYMAN(NI)
> > +		return rscreen->b.family == CHIP_CYPRESS ||
> > +		       rscreen->b.family == CHIP_CAYMAN;
> >  	}
> >  	return 0;
> >  }
> > diff --git a/src/gallium/drivers/r600/r600_shader.c
> > b/src/gallium/drivers/r600/r600_shader.c
> > index 101f666..35019e3 100644
> > --- a/src/gallium/drivers/r600/r600_shader.c
> > +++ b/src/gallium/drivers/r600/r600_shader.c
> > @@ -8917,7 +8917,7 @@ static const struct
> > r600_shader_tgsi_instruction r600_shader_tgsi_instruction[]
> >  	[TGSI_OPCODE_MAD]	= { ALU_OP3_MULADD, tgsi_op3},
> >  	[TGSI_OPCODE_SUB]	= { ALU_OP2_ADD, tgsi_op2},
> >  	[TGSI_OPCODE_LRP]	= { ALU_OP0_NOP, tgsi_lrp},
> > -	[TGSI_OPCODE_FMA]	= { ALU_OP0_NOP,
> > tgsi_unsupported},
> > +	[TGSI_OPCODE_FMA]	= { ALU_OP3_FMA, tgsi_op3},
> >  	[TGSI_OPCODE_SQRT]	= { ALU_OP1_SQRT_IEEE,
> > tgsi_trans_srcx_replicate},
> >  	[TGSI_OPCODE_DP2A]	= { ALU_OP0_NOP,
> > tgsi_unsupported},
> >  	[22]			= { ALU_OP0_NOP,
> > tgsi_unsupported},
> You probably meant to add the opcode to the
> eg_shader_tgsi_instruction and cm_shader_tgsi_instruction opcode
> tables rather than the R600/R700 one?
> 
> 
> I'll also note in passing that FMA on CYPRESS/HEMLOCK has an issue
> rate of 4/cycle vs MULADD 5/cycle since FMA cannot be issued in the
> 't' slot,
> may or may not affect performance depending on if the GLSL front end
> decides to use fma for mul+add operations. On Cayman/Aruba they are
> the same rate.

since FMA is only available on DP parts I'd expect the FMA rate to be
that of DP operations (double ops take two slots, but the issue rate is
usually lower than 1/2). I don't really know how the EG/CM pipeline
handles hazards.

Jan

> 
> 
> /Glenn
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