[Mesa-dev] [PATCH 5/7] radeonsi: set some VGT context registers on SI-CI

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

the kernel sets them, but other UMDs can change them
---
 src/gallium/drivers/radeonsi/si_state.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index d12c89b..7e09c8d 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3883,6 +3883,9 @@ static void si_init_config(struct si_context *sctx)
 			vgt_tess_distribution |= S_028B50_TRAP_SPLIT(3);
 
 		si_pm4_set_reg(pm4, R_028B50_VGT_TESS_DISTRIBUTION, vgt_tess_distribution);
+	} else {
+		si_pm4_set_reg(pm4, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 14);
+		si_pm4_set_reg(pm4, R_028C5C_VGT_OUT_DEALLOC_CNTL, 16);
 	}
 
 	if (sctx->b.family == CHIP_STONEY)
-- 
2.7.4