[Mesa-dev] [PATCH v3] nv50/ir: Check for valid insn instead of def size

[Pierre Moreau]

Functions arguments get a definition from the function itself, a definition
which is therefore not linked to any instruction. If a value ends up having a
definition but no linked instruction, the register allocation pass doesn't
need to consider that value.

This fixes a null pointer dereference during the register allocation pass, if
a function had unused arguments.

v2: Rewrite commit message based on Ilia Mirkin's comment
v3: Rewrite an incorrect statement in the commit message that was pointed out
    by Ilia Mirkin

Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index d877c25..500ab89 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -853,7 +853,7 @@ isShortRegOp(Instruction *insn)
 static bool
 isShortRegVal(LValue *lval)
 {
-   if (lval->defs.size() == 0)
+   if (lval->getInsn() == NULL)
       return false;
    for (Value::DefCIterator def = lval->defs.begin();
         def != lval->defs.end(); ++def)
@@ -1467,7 +1467,7 @@ GCRA::allocateRegisters(ArrayList& insns)
          nodes[i].init(regs, lval);
          RIG.insert(&nodes[i]);
 
-         if (lval->inFile(FILE_GPR) && lval->defs.size() > 0 &&
+         if (lval->inFile(FILE_GPR) && lval->getInsn() != NULL &&
              prog->getTarget()->getChipset() < 0xc0) {
             Instruction *insn = lval->getInsn();
             if (insn->op == OP_MAD || insn->op == OP_SAD)
-- 
2.7.4