[Mesa-dev] [PATCH 08/18] radeon/winsys: add cs_check_space

Nicolai Hähnle nhaehnle at gmail.com
Mon May 9 23:21:26 UTC 2016


From: Nicolai Hähnle <nicolai.haehnle at amd.com>

---
 src/gallium/drivers/radeon/radeon_winsys.h    | 9 +++++++++
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c     | 7 +++++++
 src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 7 +++++++
 3 files changed, 23 insertions(+)

diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 7f8bbd1..462512a 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -673,6 +673,15 @@ struct radeon_winsys {
     boolean (*cs_validate)(struct radeon_winsys_cs *cs);
 
     /**
+     * Check whether the given number of dwords is available in the IB.
+     * Optionally chain a new chunk of the IB if necessary and supported.
+     *
+     * \param cs        A command stream.
+     * \param dw        Number of CS dwords requested by the caller.
+     */
+    bool (*cs_check_space)(struct radeon_winsys_cs *cs, unsigned dw);
+
+    /**
      * Return TRUE if there is enough memory in VRAM and GTT for the buffers
      * added so far.
      *
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 1faa5e0..4f8f698 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -601,6 +601,12 @@ static boolean amdgpu_cs_validate(struct radeon_winsys_cs *rcs)
    return TRUE;
 }
 
+static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
+{
+   assert(rcs->cdw <= rcs->max_dw);
+   return rcs->max_dw - rcs->cdw >= dw;
+}
+
 static boolean amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt)
 {
    struct amdgpu_cs *cs = amdgpu_cs(rcs);
@@ -932,6 +938,7 @@ void amdgpu_cs_init_functions(struct amdgpu_winsys *ws)
    ws->base.cs_add_buffer = amdgpu_cs_add_buffer;
    ws->base.cs_lookup_buffer = amdgpu_cs_lookup_buffer;
    ws->base.cs_validate = amdgpu_cs_validate;
+   ws->base.cs_check_space = amdgpu_cs_check_space;
    ws->base.cs_memory_below_limit = amdgpu_cs_memory_below_limit;
    ws->base.cs_get_buffer_list = amdgpu_cs_get_buffer_list;
    ws->base.cs_flush = amdgpu_cs_flush;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 7a901a1..b7ad248 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -383,6 +383,12 @@ static boolean radeon_drm_cs_validate(struct radeon_winsys_cs *rcs)
     return status;
 }
 
+static bool radeon_drm_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
+{
+   assert(rcs->cdw <= rcs->max_dw);
+   return rcs->max_dw - rcs->cdw >= dw;
+}
+
 static boolean radeon_drm_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt)
 {
     struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
@@ -670,6 +676,7 @@ void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws)
     ws->base.cs_add_buffer = radeon_drm_cs_add_buffer;
     ws->base.cs_lookup_buffer = radeon_drm_cs_lookup_buffer;
     ws->base.cs_validate = radeon_drm_cs_validate;
+    ws->base.cs_check_space = radeon_drm_cs_check_space;
     ws->base.cs_memory_below_limit = radeon_drm_cs_memory_below_limit;
     ws->base.cs_get_buffer_list = radeon_drm_cs_get_buffer_list;
     ws->base.cs_flush = radeon_drm_cs_flush;
-- 
2.7.4



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