[Mesa-dev] [PATCH v2] nvc0: enable 32 textures on kepler+

Samuel Pitoiset samuel.pitoiset at gmail.com
Thu May 26 11:22:54 UTC 2016



On 05/26/2016 01:22 PM, Ilia Mirkin wrote:
> Nope, it was one of the irrelevant changes. If I were enabling 32 on
> Fermi, it'd matter, but I'm not.

Right, this function is for fermi only.
Looks good.

>
> On May 26, 2016 04:37, "Samuel Pitoiset" <samuel.pitoiset at gmail.com
> <mailto:samuel.pitoiset at gmail.com>> wrote:
>
>     I think you forgot to increase the array of commands from 16 to 32
>     in nvc0_validate_tsc() (you did it in v1).
>
>     With that addressed, this patch is:
>
>     Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com
>     <mailto:samuel.pitoiset at gmail.com>>
>
>     On 05/26/2016 04:55 AM, Ilia Mirkin wrote:
>
>         For fermi, this likely will require use of linked tsc mode.
>         However on
>         bindless architectures, we can have as many as we want. As it
>         stands,
>         the AUX_TEX_INFO has 32 teture handles reserved.
>
>         Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu
>         <mailto:imirkin at alum.mit.edu>>
>         ---
>
>         v1 -> v2: drop all the 1 -> 1U changes. They don't matter in
>         practice.
>
>          src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 2 +-
>          src/gallium/drivers/nouveau/nvc0/nvc0_screen.c  | 4 ++--
>          2 files changed, 3 insertions(+), 3 deletions(-)
>
>         diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
>         b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
>         index 436e912..5be78aa 100644
>         --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
>         +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
>         @@ -197,7 +197,7 @@ struct nvc0_context {
>             uint32_t textures_coherent[6];
>             struct nv50_tsc_entry *samplers[6][PIPE_MAX_SAMPLERS];
>             unsigned num_samplers[6];
>         -   uint16_t samplers_dirty[6];
>         +   uint32_t samplers_dirty[6];
>             bool seamless_cube_map;
>
>             uint32_t tex_handles[6][PIPE_MAX_SAMPLERS]; /* for nve4 */
>         diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
>         b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
>         index 7d692ea..4c47503 100644
>         --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
>         +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
>         @@ -369,9 +369,9 @@ nvc0_screen_get_shader_param(struct
>         pipe_screen *pscreen, unsigned shader,
>             case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
>                return NVC0_MAX_BUFFERS;
>             case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
>         -      return 16; /* would be 32 in linked (OpenGL-style) mode */
>         +      return (class_3d >= NVE4_3D_CLASS) ? 32 : 16;
>             case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
>         -      return 16; /* XXX not sure if more are really safe */
>         +      return (class_3d >= NVE4_3D_CLASS) ? 32 : 16;
>             case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
>                return 32;
>             case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
>
>
>     --
>     -Samuel
>

-- 
-Samuel


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