[Mesa-dev] [PATCH v3 00/14] i965: Rework CS local IDs for gen7+

Jordan Justen jordan.l.justen at intel.com
Sun May 29 22:38:36 UTC 2016


git://people.freedesktop.org/~jljusten/mesa hsw-cs-cross-thread-constants-v3

v3:
 * Redo uniform handling and add tweaks based on Jason's suggestions

v2:
 * https://lists.freedesktop.org/archives/mesa-dev/2016-May/118566.html

v1:
 * https://lists.freedesktop.org/archives/mesa-dev/2016-May/117952.html

Jordan Justen (14):
  glsl: Add glsl LowerCsDerivedVariables option
  nir: Make lowering gl_LocalInvocationIndex optional
  i965: Add nir channel_num system value
  i965/anv: Add uniform for a CS thread local base ID
  i965: Put CS local thread ID uniform in last push register
  i965: Add nir based intrinsic lowering and thread ID uniform
  i965: Store number of threads in brw_cs_prog_data
  i965: Add CS push constant info to brw_cs_prog_data
  squash-fwd i965: Support new local ID push constant & cross-thread
    constants
  squash anv: Support new local ID generation & cross-thread constants
  squash i965: Don't lower the CS derived variable in the GLSL compiler
  squash i965: Run the intrinsics lowering pass
  squash i965/nir: Don't lower invocation index from local ID
  squash i965: Remove old CS local ID handling

 src/compiler/glsl/builtin_variables.cpp        |  29 ++--
 src/compiler/glsl/glsl_parser_extras.cpp       |   2 +-
 src/compiler/glsl/ir.h                         |   3 +-
 src/compiler/nir/nir.c                         |   4 +
 src/compiler/nir/nir.h                         |   2 +
 src/compiler/nir/nir_gather_info.c             |   1 +
 src/compiler/nir/nir_intrinsics.h              |   2 +
 src/compiler/nir/nir_lower_system_values.c     |  16 +-
 src/intel/vulkan/anv_cmd_buffer.c              |  53 +++----
 src/intel/vulkan/anv_pipeline.c                |   4 +
 src/intel/vulkan/anv_private.h                 |   1 -
 src/intel/vulkan/gen7_cmd_buffer.c             |  15 +-
 src/intel/vulkan/gen8_cmd_buffer.c             |  13 +-
 src/intel/vulkan/genX_cmd_buffer.c             |   4 +-
 src/intel/vulkan/genX_pipeline.c               |  12 +-
 src/mesa/drivers/dri/i965/Makefile.sources     |   1 +
 src/mesa/drivers/dri/i965/brw_compiler.h       |  22 ++-
 src/mesa/drivers/dri/i965/brw_cs.c             |   3 +
 src/mesa/drivers/dri/i965/brw_defines.h        |   3 +
 src/mesa/drivers/dri/i965/brw_fs.cpp           | 196 +++++++++++++------------
 src/mesa/drivers/dri/i965/brw_fs.h             |   1 -
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp       |  22 ++-
 src/mesa/drivers/dri/i965/brw_nir.h            |   2 +
 src/mesa/drivers/dri/i965/brw_nir_intrinsics.c | 177 ++++++++++++++++++++++
 src/mesa/drivers/dri/i965/gen7_cs_state.c      | 123 +++++++---------
 src/mesa/main/mtypes.h                         |   3 +
 src/mesa/state_tracker/st_extensions.c         |   1 +
 27 files changed, 469 insertions(+), 246 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_nir_intrinsics.c

-- 
2.8.1



More information about the mesa-dev mailing list