[Mesa-dev] [RFC 03/12] egl: add EGL_ANDROID_native_fence_sync

Rob Clark robdclark at gmail.com
Tue Nov 8 00:48:25 UTC 2016


On Mon, Nov 7, 2016 at 6:29 PM, Rafael Antognolli
<rafael.antognolli at intel.com> wrote:
> On Mon, Oct 31, 2016 at 08:58:26AM -0700, Rafael Antognolli wrote:
>> On Sat, Oct 29, 2016 at 01:15:44PM -0400, Rob Clark wrote:
>> > On Fri, Oct 28, 2016 at 7:44 PM, Rafael Antognolli
>> > <rafael.antognolli at intel.com> wrote:
>
> ...
>
>> > Hey, thanks for this.  I don't suppose you have a branch somewhere w/
>> > the piglit tests?
>>
>> Ouch, I mentioned it on another email but should have mentioned it here
>> too. It's here:
>>
>> https://github.com/rantogno/piglit/tree/fences
>>
>> > I've rebased and pulled in Chad's squash patches (and also a squash
>> > patch based on the issues you pointed out), but not yet the i965
>> > patches:
>> >
>> > https://github.com/freedreno/mesa/commits/wip-fence
>>
>> Awesome, I will check that one.
>
> Just an update: I did test that branch, and there was just one change
> needed for the piglit tests to work:
>
> https://github.com/rantogno/mesa/commit/c637f1ce404acaccaa920d37c52724c9d8093597

oh, good catch.. I'll squash that in and push an updated branch soon

> You can also check my last version of these tests (also submitted to the
> piglit list) here:
>
> https://github.com/rantogno/piglit/tree/review/fences-v02
>
> The only test that I don't know how to do yet is to make sure that Mesa
> and the kernel are respecting an eglSyncWait for a native sync fence.
> eglClientWaitSyncKHR is already covered.

yeah, I can't think of a particularly easy way to test that..  but I
think the API level tests have already caught quite a few issues..

> Also I did test your series with kmscube and some other stuff too, and
> so far it's all behaving really well. I'm looking forward to see your
> patches get merged.

I guess we should pull together a unified branch.. since we have this
working for intel + virgl + freedreno.  AFAIU the current status is
intel and freedreno kernel bits are upstream.  The libdrm bits for
freedreno are upstream, not sure about intel (and virgl doesn't have
any libdrm component).  Not sure about the kernel bit for virgl, but I
assume that will be 4.10?

I have one small update for the gallium patch, to add the pipe-cap to
all the other drivers.  I usually try to wait until the patch is ready
to push since otherwise it ends up being a huge rebase headache.

I would defn like to get this merged, esp. since I'm starting to get
busy on the next thing ;-)

BR,
-R

> Thanks,
> Rafael


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