[Mesa-dev] [PATCH] i965/l3: Add explicit way size calculation for bxt

[Francisco Jerez]

Ben Widawsky <ben at bwidawsk.net> writes:

> There should be no functional change here because Broxton and CHV are
> both gt1. Without this code however, it might seem like broxton support
> is missing.
>
> While here, put the gt1 check in front to hopefully short-circuit the
> condition for the mobile cases.
>
> Cc: Francisco Jerez <currojerez at riseup.net>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>

Reviewed-by: Francisco Jerez <currojerez at riseup.net>

> ---
>  src/intel/common/gen_l3_config.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c
> index 0d99f12..0783217 100644
> --- a/src/intel/common/gen_l3_config.c
> +++ b/src/intel/common/gen_l3_config.c
> @@ -257,7 +257,9 @@ get_l3_way_size(const struct gen_device_info *devinfo)
>     if (devinfo->is_baytrail)
>        return 2;
>  
> -   else if (devinfo->is_cherryview || devinfo->gt == 1)
> +   else if (devinfo->gt == 1 ||
> +            devinfo->is_cherryview ||
> +            devinfo->is_broxton)
>        return 4;
>  
>     else
> -- 
> 2.10.0
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