[Mesa-dev] [PATCH 4/5] anv/cmd_buffer: Manage Anv state around HZ op emission

[Nanley Chery]

Move the assignment to a less surprising location.

Signed-off-by: Nanley Chery <nanley.g.chery at intel.com>
---
 src/intel/vulkan/gen8_cmd_buffer.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c
index 97a035b..330f7f3 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -533,9 +533,6 @@ genX(cmd_buffer_emit_hz_op)(struct anv_cmd_buffer *cmd_buffer,
          hzp.FullSurfaceDepthandStencilClear = full_surf_clear;
          hzp.StencilClearValue =
             cmd_state->attachments[ds].clear_value.depthStencil.stencil & 0xff;
-
-         /* Mark aspects as cleared */
-         cmd_state->attachments[ds].pending_clear_aspects = 0;
          break;
       case BLORP_HIZ_OP_DEPTH_RESOLVE:
          hzp.DepthBufferResolveEnable = true;
@@ -584,11 +581,16 @@ genX(cmd_buffer_emit_hz_op)(struct anv_cmd_buffer *cmd_buffer,
 
    anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_HZ_OP), hzp);
 
-   if (!full_surf_clear && op == BLORP_HIZ_OP_DEPTH_CLEAR) {
-      anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
-         pc.DepthStallEnable = true;
-         pc.DepthCacheFlushEnable = true;
+   if (op == BLORP_HIZ_OP_DEPTH_CLEAR) {
+      if (!full_surf_clear) {
+         anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
+            pc.DepthStallEnable = true;
+            pc.DepthCacheFlushEnable = true;
+         }
       }
+
+      /* Mark aspects as cleared */
+      cmd_state->attachments[ds].pending_clear_aspects = 0;
    }
 }
 
-- 
2.10.0