[Mesa-dev] [PATCH 2/4] gallium/radeon: make sure the address of separate CMASK is aligned properly

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

This should fix random GPU hangs on Hawaii and Fiji.

Cc: 11.2 12.0 13.0 <mesa-stable at lists.freedesktop.org>
---
 src/gallium/drivers/radeon/r600_texture.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index b57cc92..27035c0 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -819,22 +819,23 @@ static void r600_texture_alloc_cmask_separate(struct r600_common_screen *rscreen
 
 	assert(rtex->cmask.size == 0);
 
 	if (rscreen->chip_class >= SI) {
 		si_texture_get_cmask_info(rscreen, rtex, &rtex->cmask);
 	} else {
 		r600_texture_get_cmask_info(rscreen, rtex, &rtex->cmask);
 	}
 
 	rtex->cmask_buffer = (struct r600_resource *)
-		pipe_buffer_create(&rscreen->b, PIPE_BIND_CUSTOM,
-				   PIPE_USAGE_DEFAULT, rtex->cmask.size);
+		r600_aligned_buffer_create(&rscreen->b, 0, PIPE_USAGE_DEFAULT,
+					   rtex->cmask.size,
+					   rtex->cmask.alignment);
 	if (rtex->cmask_buffer == NULL) {
 		rtex->cmask.size = 0;
 		return;
 	}
 
 	/* update colorbuffer state bits */
 	rtex->cmask.base_address_reg = rtex->cmask_buffer->gpu_address >> 8;
 
 	if (rscreen->chip_class >= SI)
 		rtex->cb_color_info |= SI_S_028C70_FAST_CLEAR(1);
-- 
2.7.4