[Mesa-dev] [PATCH 19/24] winsys/amdgpu: allocate FMASK properly

Marek Olšák maraeo at gmail.com
Mon Oct 24 22:33:19 UTC 2016


From: Marek Olšák <marek.olsak at amd.com>

I expect no change in behavior, because r600_texture.c forces the same
tile mode as the base texture has.
---
 src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index 27c425c..ff71bcb 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -380,36 +380,38 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
       AddrDccIn.bpp = AddrSurfInfoIn.bpp = bpe * 8;
    }
 
    AddrDccIn.numSamples = AddrSurfInfoIn.numSamples =
       tex->nr_samples ? tex->nr_samples : 1;
    AddrSurfInfoIn.tileIndex = -1;
 
    /* Set the micro tile type. */
    if (flags & RADEON_SURF_SCANOUT)
       AddrSurfInfoIn.tileType = ADDR_DISPLAYABLE;
-   else if (flags & RADEON_SURF_Z_OR_SBUFFER)
+   else if (flags & (RADEON_SURF_Z_OR_SBUFFER | RADEON_SURF_FMASK))
       AddrSurfInfoIn.tileType = ADDR_DEPTH_SAMPLE_ORDER;
    else
       AddrSurfInfoIn.tileType = ADDR_NON_DISPLAYABLE;
 
    AddrSurfInfoIn.flags.color = !(flags & RADEON_SURF_Z_OR_SBUFFER);
    AddrSurfInfoIn.flags.depth = (flags & RADEON_SURF_ZBUFFER) != 0;
    AddrSurfInfoIn.flags.cube = tex->target == PIPE_TEXTURE_CUBE;
+   AddrSurfInfoIn.flags.fmask = (flags & RADEON_SURF_FMASK) != 0;
    AddrSurfInfoIn.flags.display = (flags & RADEON_SURF_SCANOUT) != 0;
    AddrSurfInfoIn.flags.pow2Pad = tex->last_level > 0;
    AddrSurfInfoIn.flags.tcCompatible = (flags & RADEON_SURF_TC_COMPATIBLE_HTILE) != 0;
 
    /* Only degrade the tile mode for space if TC-compatible HTILE hasn't been
     * requested, because TC-compatible HTILE requires 2D tiling.
     */
-   AddrSurfInfoIn.flags.degrade4Space = !AddrSurfInfoIn.flags.tcCompatible;
+   AddrSurfInfoIn.flags.degrade4Space = !AddrSurfInfoIn.flags.tcCompatible &&
+                                        !(flags & RADEON_SURF_FMASK);
 
    /* DCC notes:
     * - If we add MSAA support, keep in mind that CB can't decompress 8bpp
     *   with samples >= 4.
     * - Mipmapped array textures have low performance (discovered by a closed
     *   driver team).
     */
    AddrSurfInfoIn.flags.dccCompatible = ws->info.chip_class >= VI &&
                                         !(flags & RADEON_SURF_Z_OR_SBUFFER) &&
                                         !(flags & RADEON_SURF_DISABLE_DCC) &&
-- 
2.7.4



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