[Mesa-dev] [PATCH 00/59] Enable GL_ARB_gpu_shader_int64

[Connor Abbott]

On Tue, Oct 25, 2016 at 8:59 PM, Ian Romanick <idr at freedesktop.org> wrote:
> Whew!  Here it is!  There are four main groups to this patch series.
> All of this is available at:
>
>     https://cgit.freedesktop.org/~idr/mesa/log/?h=arb_gpu_shader_int64
>
> There are some gaps in our current piglit tests.  For example, I
> discovered that there are no execution tests for bitwise not... when I
> discovered that it didn't work. :)  This series does pass all the tests
> to which I have access, so it feels safe, especially this early in the
> 17.0 release process, to enable the extension now.  I expect the testing
> situation will impove in the next few months.
>
> Here's the rough breakdown of the series:
>
> Patches 1 through 7: Add support to the standalone compiler to generate
> C++ that uses ir_builder to generate the compiled shader.  I sent a
> version of this out previously, but there have been some functional
> changes.  This is used later in the series to generate some comples
> built-in functions.
>
> Patches 8 through 32: Mostly Dave's original code that enables the core
> GL_ARB_gpu_shader_int64 functionality.  I have reviewed or modified all
> of Dave's patches, but additional eyes are quite welcome.
>
> Patches 33 through 43: Enable additional lowering functions that i965
> will need.  I suspect that most drivers will need to use the
> multiplication and division functions.  Radeon does not need these
> because the lowering is done in LLVM.
>
> These functions are also made available, with #defines, when
> GL_MESA_shader_integer_functions is enabled.  This will allow testing
> the lowering functions even on drivers that don't use them.  This will
> help prevent cases where changes to the core compiler or optimization
> passes cause problems for drivers that aren't under test.
>
> Patches 44 through 50: Enable 64-bit integer support in NIR.
>
> Patches 50 through 59: Enable remaining bits ofr 64-bit integer support
> in the i965 compiler backend.  "i965: Really don't emit Q or UQ moves on
> Gen < 8" and "i965: Split SIMD16 CMP of Q and UQ instructions" went
> through numerous iterations.  If there are suggestions for handling
> these better, I would like to hear them.
>
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I read through all the NIR patches (44-50), and you can put my r-b on
everything except the two I had some comments on. I poked around
quickly and didn't notice anything missing that you didn't add. I'll
leave it up to Jason whether he wants to review them too.