[Mesa-dev] [PATCH 6/6] i965: update gl_PrimitiveIDIn to be a system variable

[Timothy Arceri]

To be squashed with previous patch
---
 src/mesa/drivers/dri/i965/brw_shader.cpp          | 3 +--
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 8 ++------
 src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp        | 5 +----
 3 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index cd893b1..61bc868 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -1355,8 +1355,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
    nir->info->patch_inputs_read = key->patch_inputs_read;
 
    struct brw_vue_map input_vue_map;
-   brw_compute_tess_vue_map(&input_vue_map,
-                            nir->info->inputs_read & ~VARYING_BIT_PRIMITIVE_ID,
+   brw_compute_tess_vue_map(&input_vue_map, nir->info->inputs_read,
                             nir->info->patch_inputs_read);
 
    nir = brw_nir_apply_sampler_key(nir, devinfo, &key->tex, is_scalar);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index 10be41b..892f9df 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -609,12 +609,8 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
     *
     * For SSO pipelines, we use a fixed VUE map layout based on variable
     * locations, so we can rely on rendezvous-by-location making this work.
-    *
-    * However, we need to ignore VARYING_SLOT_PRIMITIVE_ID, as it's not
-    * written by previous stages and shows up via payload magic.
     */
-   GLbitfield64 inputs_read =
-      shader->info->inputs_read & ~VARYING_BIT_PRIMITIVE_ID;
+   GLbitfield64 inputs_read = shader->info->inputs_read;
    brw_compute_vue_map(compiler->devinfo,
                        &c.input_vue_map, inputs_read,
                        shader->info->separate_shader);
@@ -626,7 +622,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
    shader = brw_postprocess_nir(shader, compiler->devinfo, is_scalar);
 
    prog_data->include_primitive_id =
-      (shader->info->inputs_read & VARYING_BIT_PRIMITIVE_ID) != 0;
+      (shader->info->system_values_read & 1 << SYSTEM_VALUE_PRIMITIVE_ID) != 0;
 
    prog_data->invocations = shader->info->gs.invocations;
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
index 124632c..55afe36 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
@@ -460,10 +460,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
    nir->info->patch_outputs_written = key->patch_outputs_written;
 
    struct brw_vue_map input_vue_map;
-   brw_compute_vue_map(devinfo, &input_vue_map,
-                       nir->info->inputs_read & ~VARYING_BIT_PRIMITIVE_ID,
-                       true);
-
+   brw_compute_vue_map(devinfo, &input_vue_map, nir->info->inputs_read, true);
    brw_compute_tess_vue_map(&vue_prog_data->vue_map,
                             nir->info->outputs_written,
                             nir->info->patch_outputs_written);
-- 
2.7.4