[Mesa-dev] [RFC 00/11] i965: Remove our dependence on nir_shader::info

[Jason Ekstrand]

Timothy's attempts to extract shader_info from nir_shader got me thinking,
"What if shader_info were simply a byproduct of compilation?"  His last
patch series made nir_shader::info just a pointer to gl_program::info in
most cases, so why don't we go all the way and just say that the
shader_info lives in the gl_program?

This series shows what that would look like.  Instead of grabbing the info
from the nir_shader, state setup grabs it from the gl_program.  On the
compiler side, each of the brw_compile_foo functions now takes a
shader_info structure that's treated as an in-out parameter like prog_data.
Eventually, once we use nir_gather_info for everything, it will end up
being purely an out-parameter.  Do we like the way this looks?

With this series, I can build the entire i965 backend compiler without the
nir_shader::info field.  (Of course, NIR doesn't build without that yet,
but that's a different refactor.)

Cc: Timothy Arceri <timothy.arceri at collabora.com>

Jason Ekstrand (11):
  i965: Pull shader_info out of gl_program rather than nir_shader
  i965/shader: Add an explicit shader_info field
  i965/fs: Use the new info field instead of nir->info
  i965/vec4: Use the new info field instead of nir->info
  i965/vec4: Make generate_assembly take an explicit shader_info
    parameter
  i965/compiler: Take an explicit shader_info parameter in compile_vs
  i965/compiler: Take an explicit shader_info parameter in compile_tcs
  i965/compiler: Take an explicit shader_info parameter in compile_tes
  i965/compiler: Take an explicit shader_info parameter in compile_gs
  i965/compiler: Take an explicit shader_info parameter in compile_fs
  i965/compiler: Take an explicit shader_info parameter in compile_cs

 src/intel/blorp/blorp.c                           |   4 +-
 src/intel/vulkan/anv_pipeline.c                   |   8 +-
 src/mesa/drivers/dri/i965/brw_compiler.h          |   6 ++
 src/mesa/drivers/dri/i965/brw_cs.c                |   4 +-
 src/mesa/drivers/dri/i965/brw_fs.cpp              | 102 +++++++++++-----------
 src/mesa/drivers/dri/i965/brw_fs.h                |   2 +
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp          |  18 ++--
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp      |  18 ++--
 src/mesa/drivers/dri/i965/brw_gs.c                |   2 +-
 src/mesa/drivers/dri/i965/brw_nir.c               |   3 +-
 src/mesa/drivers/dri/i965/brw_nir.h               |   4 +-
 src/mesa/drivers/dri/i965/brw_nir_intrinsics.c    |   9 +-
 src/mesa/drivers/dri/i965/brw_shader.cpp          |  32 +++----
 src/mesa/drivers/dri/i965/brw_shader.h            |   2 +
 src/mesa/drivers/dri/i965/brw_tcs.c               |  18 ++--
 src/mesa/drivers/dri/i965/brw_tes.c               |  11 +--
 src/mesa/drivers/dri/i965/brw_vec4.cpp            |  26 +++---
 src/mesa/drivers/dri/i965/brw_vec4.h              |   3 +-
 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp  |  10 +--
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp |  48 +++++-----
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h   |   1 +
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp        |   8 +-
 src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp        |  37 ++++----
 src/mesa/drivers/dri/i965/brw_vec4_tcs.h          |   1 +
 src/mesa/drivers/dri/i965/brw_vec4_tes.cpp        |   3 +-
 src/mesa/drivers/dri/i965/brw_vec4_tes.h          |   1 +
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp    |   3 +-
 src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp |   3 +-
 src/mesa/drivers/dri/i965/brw_vs.c                |   6 +-
 src/mesa/drivers/dri/i965/brw_vs.h                |   1 +
 src/mesa/drivers/dri/i965/brw_wm.c                |   8 +-
 src/mesa/drivers/dri/i965/brw_wm_iz.cpp           |   2 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |  12 +--
 src/mesa/drivers/dri/i965/gen6_gs_visitor.cpp     |  12 +--
 src/mesa/drivers/dri/i965/gen6_gs_visitor.h       |   5 +-
 35 files changed, 233 insertions(+), 200 deletions(-)

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2.5.0.400.gff86faf