[Mesa-dev] [PATCH 05/31] radeonsi: fix signature of export intrinsic in VS epilog

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haehnle at amd.com>

The incompatible signature becomes an issue when the VS epilog gets merged
with the main vertex shader at the IR level.
---
 src/gallium/drivers/radeonsi/si_shader.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 2b8c168..8871742 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -7107,23 +7107,23 @@ static bool si_compile_vs_epilog(struct si_screen *sscreen,
 		LLVMValueRef args[9];
 
 		args[0] = lp_build_const_int32(base->gallivm, 0x0); /* enabled channels */
 		args[1] = uint->zero; /* whether the EXEC mask is valid */
 		args[2] = uint->zero; /* DONE bit */
 		args[3] = lp_build_const_int32(base->gallivm, V_008DFC_SQ_EXP_PARAM +
 					       key->vs_epilog.prim_id_param_offset);
 		args[4] = uint->zero; /* COMPR flag (0 = 32-bit export) */
 		args[5] = LLVMGetParam(ctx.main_fn,
 				       VS_EPILOG_PRIMID_LOC); /* X */
-		args[6] = uint->undef; /* Y */
-		args[7] = uint->undef; /* Z */
-		args[8] = uint->undef; /* W */
+		args[6] = base->undef; /* Y */
+		args[7] = base->undef; /* Z */
+		args[8] = base->undef; /* W */
 
 		lp_build_intrinsic(base->gallivm->builder, "llvm.SI.export",
 				   LLVMVoidTypeInContext(base->gallivm->context),
 				   args, 9, 0);
 	}
 
 	/* Compile. */
 	LLVMBuildRetVoid(gallivm->builder);
 	si_llvm_finalize_module(&ctx,
 		r600_extra_shader_checks(&sscreen->b, PIPE_SHADER_VERTEX));
-- 
2.7.4