[Mesa-dev] [PATCH 1/3] i965: solve cubemap negative x/y/z faces buffer offset issue in dEQP.

[Tapani Pälli]

I have only 6 failures in that set currently, but this patch fixes all 
of them. Reason seems to be that with these cases we never up calling 
intel_miptree_get_tile_offsets and therefore use uninitialized values 
for tile_x and tile_y.

Tested-by: Tapani Pälli <tapani.palli at intel.com>

On 09/30/2016 08:56 AM, Xu,Randy wrote:
> Add the miptree level/slice x/y_offset when count the surface offset
> in brw_emit_surface_state. The surface offset has two parts, one is
> from mt->offset, which should be 32 aligned in width/height for tiled
> buffer; another is from mt->level[current_level].slice[current_slice].
> x/y_offset.
>
> This fix will solve 12 deqp failure
> dEQP-EGL.functional.image.create.gles2_cubemap_negative_*_texture
>
> Signed-off-by: Xu,Randy <randy.xu at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index 61a4b94..3a5c573 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -85,7 +85,8 @@ brw_emit_surface_state(struct brw_context *brw,
>                         unsigned read_domains, unsigned write_domains)
>  {
>     const struct surface_state_info ss_info = surface_state_infos[brw->gen];
> -   uint32_t tile_x = 0, tile_y = 0;
> +   uint32_t tile_x = mt->level[0].slice[0].x_offset;
> +   uint32_t tile_y = mt->level[0].slice[0].y_offset;
>     uint32_t offset = mt->offset;
>
>     struct isl_surf surf;
>