[Mesa-dev] [PATCH] i965/fs: Always provide a default LOD of 0 for TXS and TXL

[Lionel Landwerlin]

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>

On 04/04/17 23:38, Jason Ekstrand wrote:
> We already provide a default LOD for textureQueryLevels and texture() on
> non-fragment stages.  However, there are more cases where one is needed
> such as textureSize(gsampler2DMS*) in SPIR-V.  Instead of trying to list
> out all of the cases one at a time, just provide the default for all TXS
> and TXL operations.  This fixes a shader validation error in the new
> Sascha deferredmultisampling demo which uses textureSize(gsampler2DMS).
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100391
> Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> Cc: "13.0 17.0" <mesa-stable at lists.freedesktop.org>
> ---
>   src/intel/compiler/brw_fs_nir.cpp | 18 +++++++++---------
>   1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
> index bc1ccfb..23cd4b7 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -4380,15 +4380,6 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
>      srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(instr->coord_components);
>      srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(lod_components);
>   
> -   if (instr->op == nir_texop_query_levels ||
> -       (instr->op == nir_texop_tex && stage != MESA_SHADER_FRAGMENT)) {
> -      /* textureQueryLevels() and texture() are implemented in terms of TXS
> -       * and TXL respectively, so we need to pass a valid LOD argument.
> -       */
> -      assert(srcs[TEX_LOGICAL_SRC_LOD].file == BAD_FILE);
> -      srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_ud(0u);
> -   }
> -
>      enum opcode opcode;
>      switch (instr->op) {
>      case nir_texop_tex:
> @@ -4455,6 +4446,15 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
>         unreachable("unknown texture opcode");
>      }
>   
> +   /* TXS and TXL require a LOD but not everything we implement using those
> +    * two opcodes provides one.  Provide a default LOD of 0.
> +    */
> +   if ((opcode == SHADER_OPCODE_TXS_LOGICAL ||
> +        opcode == SHADER_OPCODE_TXL_LOGICAL) &&
> +       srcs[TEX_LOGICAL_SRC_LOD].file == BAD_FILE) {
> +      srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_ud(0u);
> +   }
> +
>      if (instr->op == nir_texop_tg4) {
>         if (instr->component == 1 &&
>             key_tex->gather_channel_quirk_mask & (1 << texture)) {