[Mesa-dev] [PATCH 39/61] radeonsi/gfx9: load GS inputs from LDS
Marek Olšák
maraeo at gmail.com
Mon Apr 24 08:45:36 UTC 2017
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeonsi/si_shader.c | 45 +++++++++++++++++++++++++++-----
1 file changed, 39 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 0d94bdd..03fa30c 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1060,57 +1060,85 @@ static LLVMValueRef fetch_input_gs(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_src_register *reg,
enum tgsi_opcode_type type,
unsigned swizzle)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct si_shader *shader = ctx->shader;
struct lp_build_context *uint = &ctx->bld_base.uint_bld;
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMValueRef vtx_offset, soffset;
- unsigned vtx_offset_param;
struct tgsi_shader_info *info = &shader->selector->info;
unsigned semantic_name = info->input_semantic_name[reg->Register.Index];
unsigned semantic_index = info->input_semantic_index[reg->Register.Index];
unsigned param;
LLVMValueRef value;
if (swizzle != ~0 && semantic_name == TGSI_SEMANTIC_PRIMID)
return get_primitive_id(bld_base, swizzle);
if (!reg->Register.Dimension)
return NULL;
+ param = si_shader_io_get_unique_index(semantic_name, semantic_index);
+
+ /* GFX9 has the ESGS ring in LDS. */
+ if (ctx->screen->b.chip_class >= GFX9) {
+ unsigned index = reg->Dimension.Index;
+
+ switch (index / 2) {
+ case 0:
+ vtx_offset = unpack_param(ctx, ctx->param_gs_vtx01_offset,
+ index % 2 ? 16 : 0, 16);
+ break;
+ case 1:
+ vtx_offset = unpack_param(ctx, ctx->param_gs_vtx23_offset,
+ index % 2 ? 16 : 0, 16);
+ break;
+ case 2:
+ vtx_offset = unpack_param(ctx, ctx->param_gs_vtx45_offset,
+ index % 2 ? 16 : 0, 16);
+ break;
+ default:
+ assert(0);
+ return NULL;
+ }
+
+ vtx_offset = LLVMBuildAdd(gallivm->builder, vtx_offset,
+ LLVMConstInt(ctx->i32, param * 4, 0), "");
+ return lds_load(bld_base, type, swizzle, vtx_offset);
+ }
+
+ /* GFX6: input load from the ESGS ring in memory. */
if (swizzle == ~0) {
LLVMValueRef values[TGSI_NUM_CHANNELS];
unsigned chan;
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
values[chan] = fetch_input_gs(bld_base, reg, type, chan);
}
return lp_build_gather_values(gallivm, values,
TGSI_NUM_CHANNELS);
}
- /* Get the vertex offset parameter */
- vtx_offset_param = reg->Dimension.Index;
+ /* Get the vertex offset parameter on GFX6. */
+ unsigned vtx_offset_param = reg->Dimension.Index;
if (vtx_offset_param < 2) {
vtx_offset_param += ctx->param_gs_vtx0_offset;
} else {
assert(vtx_offset_param < 6);
vtx_offset_param += ctx->param_gs_vtx2_offset - 2;
}
vtx_offset = lp_build_mul_imm(uint,
LLVMGetParam(ctx->main_fn,
vtx_offset_param),
4);
- param = si_shader_io_get_unique_index(semantic_name, semantic_index);
soffset = LLVMConstInt(ctx->i32, (param * 4 + swizzle) * 256, 0);
value = ac_build_buffer_load(&ctx->ac, ctx->esgs_ring, 1, ctx->i32_0,
vtx_offset, soffset, 0, 1, 0, true);
if (tgsi_type_is_64bit(type)) {
LLVMValueRef value2;
soffset = LLVMConstInt(ctx->i32, (param * 4 + swizzle + 1) * 256, 0);
value2 = ac_build_buffer_load(&ctx->ac, ctx->esgs_ring, 1,
ctx->i32_0, vtx_offset, soffset,
@@ -6144,37 +6172,42 @@ static void create_function(struct si_shader_context *ctx)
bld_base->info->opcode_count[TGSI_OPCODE_DDY_FINE] > 0 ||
bld_base->info->opcode_count[TGSI_OPCODE_INTERP_OFFSET] > 0 ||
bld_base->info->opcode_count[TGSI_OPCODE_INTERP_SAMPLE] > 0))
ctx->lds =
LLVMAddGlobalInAddressSpace(gallivm->module,
LLVMArrayType(ctx->i32, 64),
"ddxy_lds",
LOCAL_ADDR_SPACE);
if (shader->key.as_ls ||
- ctx->type == PIPE_SHADER_TESS_CTRL)
+ ctx->type == PIPE_SHADER_TESS_CTRL ||
+ /* GFX9 has the ESGS ring buffer in LDS. */
+ (ctx->screen->b.chip_class >= GFX9 &&
+ (shader->key.as_es ||
+ ctx->type == PIPE_SHADER_GEOMETRY)))
declare_lds_as_pointer(ctx);
}
/**
* Load ESGS and GSVS ring buffer resource descriptors and save the variables
* for later use.
*/
static void preload_ring_buffers(struct si_shader_context *ctx)
{
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef buf_ptr = LLVMGetParam(ctx->main_fn,
ctx->param_rw_buffers);
- if (ctx->shader->key.as_es || ctx->type == PIPE_SHADER_GEOMETRY) {
+ if (ctx->screen->b.chip_class <= VI &&
+ (ctx->shader->key.as_es || ctx->type == PIPE_SHADER_GEOMETRY)) {
unsigned ring =
ctx->type == PIPE_SHADER_GEOMETRY ? SI_GS_RING_ESGS
: SI_ES_RING_ESGS;
LLVMValueRef offset = LLVMConstInt(ctx->i32, ring, 0);
ctx->esgs_ring =
ac_build_indexed_load_const(&ctx->ac, buf_ptr, offset);
}
if (ctx->shader->is_gs_copy_shader) {
--
2.7.4
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