[Mesa-dev] [PATCH 2/5] intel/blorp: Delete the MOCS plumbing

[Jason Ekstrand]

---
 src/intel/blorp/blorp.h               |  6 ------
 src/intel/blorp/blorp_genX_exec.h     | 37 +++++++++++++++++++++++------------
 src/intel/vulkan/anv_blorp.c          |  3 ---
 src/mesa/drivers/dri/i965/brw_blorp.c | 15 --------------
 4 files changed, 24 insertions(+), 37 deletions(-)

diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index d19920e..345e4f6 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -45,12 +45,6 @@ struct blorp_context {
 
    const struct brw_compiler *compiler;
 
-   struct {
-      uint32_t tex;
-      uint32_t rb;
-      uint32_t vb;
-   } mocs;
-
    bool (*lookup_shader)(struct blorp_context *blorp,
                          const void *key, uint32_t key_size,
                          uint32_t *kernel_out, void *prog_data_out);
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 9353416..ff17f21 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -28,6 +28,7 @@
 #include "common/gen_device_info.h"
 #include "common/gen_sample_positions.h"
 #include "genxml/gen_macros.h"
+#include "i915_drm.h"
 
 /**
  * This file provides the blorp pipeline setup and execution functionality.
@@ -257,6 +258,25 @@ blorp_emit_input_varying_data(struct blorp_batch *batch,
    blorp_flush_range(batch, data, *size);
 }
 
+#if GEN_GEN >= 6
+static uint32_t
+get_vb_mocs()
+{
+#if GEN_GEN == 6
+   return 0; /* PTE */
+#elif GEN_GEN == 7
+   return 1; /* Cache in L3$, LLC and eLLC use PTE */
+#elif GEN_GEN == 8
+   return 0x78; /* LLC and eLLC are forced to WB */
+#elif GEN_GEN >= 9
+   /* We have to shift by one because of a reserved bit in the MOCS field */
+   return I915_MOCS_CACHED << 1;
+#else
+#  error "Unknown hardware generation"
+#endif
+}
+#endif
+
 static void
 blorp_emit_vertex_buffers(struct blorp_batch *batch,
                           const struct blorp_params *params)
@@ -269,7 +289,7 @@ blorp_emit_vertex_buffers(struct blorp_batch *batch,
    vb[0].VertexBufferIndex = 0;
    vb[0].BufferPitch = 3 * sizeof(float);
 #if GEN_GEN >= 6
-   vb[0].VertexBufferMOCS = batch->blorp->mocs.vb;
+   vb[0].VertexBufferMOCS = get_vb_mocs();
 #endif
 #if GEN_GEN >= 7
    vb[0].AddressModifyEnable = true;
@@ -290,7 +310,7 @@ blorp_emit_vertex_buffers(struct blorp_batch *batch,
    vb[1].VertexBufferIndex = 1;
    vb[1].BufferPitch = 0;
 #if GEN_GEN >= 6
-   vb[1].VertexBufferMOCS = batch->blorp->mocs.vb;
+   vb[1].VertexBufferMOCS = get_vb_mocs();
 #endif
 #if GEN_GEN >= 7
    vb[1].AddressModifyEnable = true;
@@ -1235,13 +1255,10 @@ blorp_emit_surface_state(struct blorp_batch *batch,
          write_disable_mask |= ISL_CHANNEL_ALPHA_BIT;
    }
 
-   const uint32_t mocs =
-      is_render_target ? batch->blorp->mocs.rb : batch->blorp->mocs.tex;
-
    isl_surf_fill_state(batch->blorp->isl_dev, state,
                        .surf = &surf, .view = &surface->view,
                        .aux_surf = &surface->aux_surf, .aux_usage = aux_usage,
-                       .mocs = mocs, .clear_color = surface->clear_color,
+                       .clear_color = surface->clear_color,
                        .write_disables = write_disable_mask);
 
    blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset,
@@ -1363,13 +1380,7 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch,
    if (dw == NULL)
       return;
 
-   struct isl_depth_stencil_hiz_emit_info info = {
-#if GEN_GEN >= 7
-      .mocs = 1, /* GEN7_MOCS_L3 */
-#else
-      .mocs = 0,
-#endif
-   };
+   struct isl_depth_stencil_hiz_emit_info info = { 0, };
 
    if (params->depth.enabled) {
       info.view = &params->depth.view;
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 860e50a..4f7ae63 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -92,9 +92,6 @@ anv_device_init_blorp(struct anv_device *device)
    anv_pipeline_cache_init(&device->blorp_shader_cache, device, true);
    blorp_init(&device->blorp, device, &device->isl_dev);
    device->blorp.compiler = device->instance->physicalDevice.compiler;
-   device->blorp.mocs.tex = device->default_mocs;
-   device->blorp.mocs.rb = device->default_mocs;
-   device->blorp.mocs.vb = device->default_mocs;
    device->blorp.lookup_shader = lookup_blorp_shader;
    device->blorp.upload_shader = upload_blorp_shader;
    switch (device->info.gen) {
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index b2987ca..f15f467 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -82,15 +82,9 @@ brw_blorp_init(struct brw_context *brw)
       brw->blorp.exec = gen5_blorp_exec;
       break;
    case 6:
-      brw->blorp.mocs.tex = 0;
-      brw->blorp.mocs.rb = 0;
-      brw->blorp.mocs.vb = 0;
       brw->blorp.exec = gen6_blorp_exec;
       break;
    case 7:
-      brw->blorp.mocs.tex = GEN7_MOCS_L3;
-      brw->blorp.mocs.rb = GEN7_MOCS_L3;
-      brw->blorp.mocs.vb = GEN7_MOCS_L3;
       if (brw->is_haswell) {
          brw->blorp.exec = gen75_blorp_exec;
       } else {
@@ -98,21 +92,12 @@ brw_blorp_init(struct brw_context *brw)
       }
       break;
    case 8:
-      brw->blorp.mocs.tex = BDW_MOCS_WB;
-      brw->blorp.mocs.rb = BDW_MOCS_PTE;
-      brw->blorp.mocs.vb = BDW_MOCS_WB;
       brw->blorp.exec = gen8_blorp_exec;
       break;
    case 9:
-      brw->blorp.mocs.tex = SKL_MOCS_WB;
-      brw->blorp.mocs.rb = SKL_MOCS_PTE;
-      brw->blorp.mocs.vb = SKL_MOCS_WB;
       brw->blorp.exec = gen9_blorp_exec;
       break;
    case 10:
-      brw->blorp.mocs.tex = CNL_MOCS_WB;
-      brw->blorp.mocs.rb = CNL_MOCS_PTE;
-      brw->blorp.mocs.vb = CNL_MOCS_WB;
       brw->blorp.exec = gen10_blorp_exec;
       break;
    default:
-- 
2.5.0.400.gff86faf