[Mesa-dev] [PATCH 3/5] i965: Stop passing MOCS information into ISL

[Jason Ekstrand]

As of a couple of commits ago, ISL is ignoring it.
---
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 26 ++++--------------------
 1 file changed, 4 insertions(+), 22 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index a0ca6dd..4d87eca 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -60,20 +60,6 @@ enum {
    INTEL_AUX_BUFFER_DISABLED = 1 << 1,
 };
 
-uint32_t tex_mocs[] = {
-   [7] = GEN7_MOCS_L3,
-   [8] = BDW_MOCS_WB,
-   [9] = SKL_MOCS_WB,
-   [10] = CNL_MOCS_WB,
-};
-
-uint32_t rb_mocs[] = {
-   [7] = GEN7_MOCS_L3,
-   [8] = BDW_MOCS_PTE,
-   [9] = SKL_MOCS_PTE,
-   [10] = CNL_MOCS_PTE,
-};
-
 static void
 get_isl_surf(struct brw_context *brw, struct intel_mipmap_tree *mt,
              GLenum target, struct isl_view *view,
@@ -132,7 +118,7 @@ brw_emit_surface_state(struct brw_context *brw,
                        struct intel_mipmap_tree *mt,
                        GLenum target, struct isl_view view,
                        enum isl_aux_usage aux_usage,
-                       uint32_t mocs, uint32_t *surf_offset, int surf_index,
+                       uint32_t *surf_offset, int surf_index,
                        unsigned read_domains, unsigned write_domains)
 {
    uint32_t tile_x = mt->level[0].level_x;
@@ -183,7 +169,7 @@ brw_emit_surface_state(struct brw_context *brw,
                        .address = mt->bo->offset64 + offset,
                        .aux_surf = aux_surf, .aux_usage = aux_usage,
                        .aux_address = aux_offset,
-                       .mocs = mocs, .clear_color = clear_color,
+                       .clear_color = clear_color,
                        .x_offset_sa = tile_x, .y_offset_sa = tile_y);
 
    brw_emit_reloc(&brw->batch, *surf_offset + brw->isl_dev.ss.addr_offset,
@@ -244,7 +230,6 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
 
    uint32_t offset;
    brw_emit_surface_state(brw, mt, mt->target, view, aux_usage,
-                          rb_mocs[brw->gen],
                           &offset, surf_index,
                           I915_GEM_DOMAIN_RENDER,
                           I915_GEM_DOMAIN_RENDER);
@@ -589,7 +574,6 @@ brw_update_texture_surface(struct gl_context *ctx,
          aux_usage = ISL_AUX_USAGE_NONE;
 
       brw_emit_surface_state(brw, mt, mt->target, view, aux_usage,
-                             tex_mocs[brw->gen],
                              surf_offset, surf_index,
                              I915_GEM_DOMAIN_SAMPLER, 0);
    }
@@ -614,8 +598,7 @@ brw_emit_buffer_surface_state(struct brw_context *brw,
                          .address = (bo ? bo->offset64 : 0) + buffer_offset,
                          .size = buffer_size,
                          .format = surface_format,
-                         .stride = pitch,
-                         .mocs = tex_mocs[brw->gen]);
+                         .stride = pitch);
 
    if (bo) {
       brw_emit_reloc(&brw->batch, *out_offset + brw->isl_dev.ss.addr_offset,
@@ -1163,7 +1146,6 @@ update_renderbuffer_read_surfaces(struct brw_context *brw)
                aux_usage = ISL_AUX_USAGE_NONE;
 
             brw_emit_surface_state(brw, irb->mt, target, view, aux_usage,
-                                   tex_mocs[brw->gen],
                                    surf_offset, surf_index,
                                    I915_GEM_DOMAIN_SAMPLER, 0);
 
@@ -1652,7 +1634,7 @@ update_image_surface(struct brw_context *brw,
                                                        view.base_array_layer,
                                                        view.array_len));
             brw_emit_surface_state(brw, mt, mt->target, view,
-                                   ISL_AUX_USAGE_NONE, tex_mocs[brw->gen],
+                                   ISL_AUX_USAGE_NONE,
                                    surf_offset, surf_index,
                                    I915_GEM_DOMAIN_SAMPLER,
                                    access == GL_READ_ONLY ? 0 :
-- 
2.5.0.400.gff86faf