[Mesa-dev] [PATCH] radv: fix tile swizzle regression on mipmaps.

[Bas Nieuwenhuizen]

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

On Fri, Aug 4, 2017 at 7:46 AM, Dave Airlie <airlied at gmail.com> wrote:
> From: Dave Airlie <airlied at redhat.com>
>
> When Marek enabled mipmapped swizzle, radv didn't
> have the code in place to handle it. This fixes the
> regression.
>
> I'll look more into GFX9 once I have a vega card (soon).
> Fixes: 2b7e8556 (ac/surface: enable tile swizzle for mipmapped textures)
>
> Signed-off-by: Dave Airlie <airlied at redhat.com>
> ---
>  src/amd/vulkan/radv_device.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
> index 9a34a20..cb68b52 100644
> --- a/src/amd/vulkan/radv_device.c
> +++ b/src/amd/vulkan/radv_device.c
> @@ -2964,6 +2964,8 @@ radv_initialise_color_surface(struct radv_device *device,
>
>         va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
>
> +       cb->cb_color_base = va >> 8;
> +
>         if (device->physical_device->rad_info.chip_class >= GFX9) {
>                 struct gfx9_surf_meta_flags meta;
>                 if (iview->image->dcc_offset)
> @@ -2976,12 +2978,14 @@ radv_initialise_color_surface(struct radv_device *device,
>                         S_028C74_RB_ALIGNED(meta.rb_aligned) |
>                         S_028C74_PIPE_ALIGNED(meta.pipe_aligned);
>
> -               va += iview->image->surface.u.gfx9.surf_offset >> 8;
> +               cb->cb_color_base += iview->image->surface.u.gfx9.surf_offset >> 8;
>         } else {
>                 const struct legacy_surf_level *level_info = &surf->u.legacy.level[iview->base_mip];
>                 unsigned pitch_tile_max, slice_tile_max, tile_mode_index;
>
> -               va += level_info->offset;
> +               cb->cb_color_base += level_info->offset >> 8;
> +               if (level_info->mode == RADEON_SURF_MODE_2D)
> +                       cb->cb_color_base |= iview->image->surface.tile_swizzle;
>
>                 pitch_tile_max = level_info->nblk_x / 8 - 1;
>                 slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1;
> @@ -3008,9 +3012,6 @@ radv_initialise_color_surface(struct radv_device *device,
>                 }
>         }
>
> -       cb->cb_color_base = va >> 8;
> -       if (device->physical_device->rad_info.chip_class < GFX9)
> -               cb->cb_color_base |= iview->image->surface.tile_swizzle;
>         /* CMASK variables */
>         va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
>         va += iview->image->cmask.offset;
> --
> 2.9.4
>
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