[Mesa-dev] [PATCH 1/2] gallium/radeon: sort DBG shader flags according to pipe_shader_type
Samuel Pitoiset
samuel.pitoiset at gmail.com
Wed Aug 30 08:03:10 UTC 2017
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
On 08/30/2017 12:25 AM, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> ---
> src/gallium/drivers/r600/r600_pipe.c | 2 +-
> src/gallium/drivers/radeon/r600_pipe_common.c | 20 ++------------------
> src/gallium/drivers/radeon/r600_pipe_common.h | 25 ++++++++++++-------------
> src/gallium/drivers/radeonsi/si_pipe.c | 5 ++---
> 4 files changed, 17 insertions(+), 35 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
> index 023f1b4..9844add 100644
> --- a/src/gallium/drivers/r600/r600_pipe.c
> +++ b/src/gallium/drivers/r600/r600_pipe.c
> @@ -659,21 +659,21 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws,
> if (rscreen->b.info.chip_class >= EVERGREEN) {
> rscreen->b.b.is_format_supported = evergreen_is_format_supported;
> } else {
> rscreen->b.b.is_format_supported = r600_is_format_supported;
> }
>
> rscreen->b.debug_flags |= debug_get_flags_option("R600_DEBUG", r600_debug_options, 0);
> if (debug_get_bool_option("R600_DEBUG_COMPUTE", FALSE))
> rscreen->b.debug_flags |= DBG_COMPUTE;
> if (debug_get_bool_option("R600_DUMP_SHADERS", FALSE))
> - rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS | DBG_TCS | DBG_TES;
> + rscreen->b.debug_flags |= DBG_ALL_SHADERS | DBG_FS;
> if (!debug_get_bool_option("R600_HYPERZ", TRUE))
> rscreen->b.debug_flags |= DBG_NO_HYPERZ;
>
> if (rscreen->b.family == CHIP_UNKNOWN) {
> fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->b.info.pci_id);
> FREE(rscreen);
> return NULL;
> }
>
> /* Figure out streamout kernel support. */
> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
> index 7c12565..6b61901 100644
> --- a/src/gallium/drivers/radeon/r600_pipe_common.c
> +++ b/src/gallium/drivers/radeon/r600_pipe_common.c
> @@ -892,22 +892,21 @@ static const char *r600_get_family_name(const struct r600_common_screen *rscreen
> case CHIP_STONEY: return "AMD STONEY";
> case CHIP_VEGA10: return "AMD VEGA10";
> case CHIP_RAVEN: return "AMD RAVEN";
> default: return "AMD unknown";
> }
> }
>
> static void r600_disk_cache_create(struct r600_common_screen *rscreen)
> {
> /* Don't use the cache if shader dumping is enabled. */
> - if (rscreen->debug_flags &
> - (DBG_FS | DBG_VS | DBG_TCS | DBG_TES | DBG_GS | DBG_PS | DBG_CS))
> + if (rscreen->debug_flags & DBG_ALL_SHADERS)
> return;
>
> uint32_t mesa_timestamp;
> if (disk_cache_get_function_timestamp(r600_disk_cache_create,
> &mesa_timestamp)) {
> char *timestamp_str;
> int res = -1;
> if (rscreen->chip_class < SI) {
> res = asprintf(×tamp_str, "%u",mesa_timestamp);
> }
> @@ -1528,36 +1527,21 @@ void r600_destroy_common_screen(struct r600_common_screen *rscreen)
> slab_destroy_parent(&rscreen->pool_transfers);
>
> disk_cache_destroy(rscreen->disk_shader_cache);
> rscreen->ws->destroy(rscreen->ws);
> FREE(rscreen);
> }
>
> bool r600_can_dump_shader(struct r600_common_screen *rscreen,
> unsigned processor)
> {
> - switch (processor) {
> - case PIPE_SHADER_VERTEX:
> - return (rscreen->debug_flags & DBG_VS) != 0;
> - case PIPE_SHADER_TESS_CTRL:
> - return (rscreen->debug_flags & DBG_TCS) != 0;
> - case PIPE_SHADER_TESS_EVAL:
> - return (rscreen->debug_flags & DBG_TES) != 0;
> - case PIPE_SHADER_GEOMETRY:
> - return (rscreen->debug_flags & DBG_GS) != 0;
> - case PIPE_SHADER_FRAGMENT:
> - return (rscreen->debug_flags & DBG_PS) != 0;
> - case PIPE_SHADER_COMPUTE:
> - return (rscreen->debug_flags & DBG_CS) != 0;
> - default:
> - return false;
> - }
> + return rscreen->debug_flags && (1 << processor);
> }
>
> bool r600_extra_shader_checks(struct r600_common_screen *rscreen, unsigned processor)
> {
> return (rscreen->debug_flags & DBG_CHECK_IR) ||
> r600_can_dump_shader(rscreen, processor);
> }
>
> void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst,
> uint64_t offset, uint64_t size, unsigned value)
> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
> index 59886ec..b0cd502 100644
> --- a/src/gallium/drivers/radeon/r600_pipe_common.h
> +++ b/src/gallium/drivers/radeon/r600_pipe_common.h
> @@ -62,34 +62,33 @@ struct u_log_context;
> #define R600_CONTEXT_START_PIPELINE_STATS (1u << 1)
> #define R600_CONTEXT_STOP_PIPELINE_STATS (1u << 2)
> #define R600_CONTEXT_PRIVATE_FLAG (1u << 3)
>
> /* special primitive types */
> #define R600_PRIM_RECTANGLE_LIST PIPE_PRIM_MAX
>
> #define R600_NOT_QUERY 0xffffffff
>
> /* Debug flags. */
> -/* logging and features */
> -#define DBG_TEX (1 << 0)
> -#define DBG_NIR (1 << 1)
> -#define DBG_COMPUTE (1 << 2)
> -#define DBG_VM (1 << 3)
> +#define DBG_VS (1 << PIPE_SHADER_VERTEX)
> +#define DBG_PS (1 << PIPE_SHADER_FRAGMENT)
> +#define DBG_GS (1 << PIPE_SHADER_GEOMETRY)
> +#define DBG_TCS (1 << PIPE_SHADER_TESS_CTRL)
> +#define DBG_TES (1 << PIPE_SHADER_TESS_EVAL)
> +#define DBG_CS (1 << PIPE_SHADER_COMPUTE)
> +#define DBG_ALL_SHADERS (DBG_FS - 1)
> +#define DBG_FS (1 << 6) /* fetch shader */
> +#define DBG_TEX (1 << 7)
> +#define DBG_NIR (1 << 8)
> +#define DBG_COMPUTE (1 << 9)
> /* gap */
> -/* shader logging */
> -#define DBG_FS (1 << 5)
> -#define DBG_VS (1 << 6)
> -#define DBG_GS (1 << 7)
> -#define DBG_PS (1 << 8)
> -#define DBG_CS (1 << 9)
> -#define DBG_TCS (1 << 10)
> -#define DBG_TES (1 << 11)
> +#define DBG_VM (1 << 11)
> #define DBG_NO_IR (1 << 12)
> #define DBG_NO_TGSI (1 << 13)
> #define DBG_NO_ASM (1 << 14)
> #define DBG_PREOPT_IR (1 << 15)
> #define DBG_CHECK_IR (1 << 16)
> #define DBG_NO_OPT_VARIANT (1 << 17)
> #define DBG_FS_CORRECT_DERIVS_AFTER_KILL (1 << 18)
> /* gaps */
> #define DBG_TEST_DMA (1 << 20)
> /* Bits 21-31 are reserved for the r600g driver. */
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 18d5806..b27159b 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -364,22 +364,21 @@ static struct pipe_context *si_pipe_create_context(struct pipe_screen *screen,
> * thread, asynchronous compilation is required for create_{shader}_-
> * state not to use pipe_context. Debug contexts (ddebug) disable
> * asynchronous compilation, so don't use the threaded context with
> * those.
> */
> if (flags & (PIPE_CONTEXT_COMPUTE_ONLY | PIPE_CONTEXT_DEBUG))
> return ctx;
>
> /* When shaders are logged to stderr, asynchronous compilation is
> * disabled too. */
> - if (sscreen->b.debug_flags & (DBG_VS | DBG_TCS | DBG_TES | DBG_GS |
> - DBG_PS | DBG_CS))
> + if (sscreen->b.debug_flags & DBG_ALL_SHADERS)
> return ctx;
>
> return threaded_context_create(ctx, &sscreen->b.pool_transfers,
> r600_replace_buffer_storage,
> &((struct si_context*)ctx)->b.tc);
> }
>
> /*
> * pipe_screen
> */
> @@ -1077,21 +1076,21 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
> (sscreen->b.debug_flags & DBG_MONOLITHIC_SHADERS) != 0;
>
> sscreen->b.barrier_flags.cp_to_L2 = SI_CONTEXT_INV_SMEM_L1 |
> SI_CONTEXT_INV_VMEM_L1;
> if (sscreen->b.chip_class <= VI)
> sscreen->b.barrier_flags.cp_to_L2 |= SI_CONTEXT_INV_GLOBAL_L2;
>
> sscreen->b.barrier_flags.compute_to_L2 = SI_CONTEXT_CS_PARTIAL_FLUSH;
>
> if (debug_get_bool_option("RADEON_DUMP_SHADERS", false))
> - sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
> + sscreen->b.debug_flags |= DBG_ALL_SHADERS;
>
> for (i = 0; i < num_compiler_threads; i++)
> sscreen->tm[i] = si_create_llvm_target_machine(sscreen);
> for (i = 0; i < num_compiler_threads_lowprio; i++)
> sscreen->tm_low_priority[i] = si_create_llvm_target_machine(sscreen);
>
> /* Create the auxiliary context. This must be done last. */
> sscreen->b.aux_context = si_create_context(&sscreen->b.b, 0);
>
> if (sscreen->b.debug_flags & DBG_TEST_DMA)
>
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