[Mesa-dev] [PATCH v4 11/44] i965: Support for 16-bit base types in helper functions

[Pohjolainen, Topi]

On Thu, Nov 30, 2017 at 03:07:55AM +0100, Jose Maria Casanova Crespo wrote:
> v2: Fixed calculation of scalar size for 16-bit types. (Jason Ekstrand)
> 
> Signed-off-by: Jose Maria Casanova Crespo <jmcasanova at igalia.com>
> Signed-off-by: Eduardo Lima <elima at igalia.com>
> Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
> ---
>  src/intel/compiler/brw_fs.cpp     |  4 ++++
>  src/intel/compiler/brw_nir.c      | 16 ++++++++++++++++
>  src/intel/compiler/brw_shader.cpp |  6 ++++++
>  3 files changed, 26 insertions(+)
> 
> diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
> index 6772c0d5a5..6cdd2bd9f3 100644
> --- a/src/intel/compiler/brw_fs.cpp
> +++ b/src/intel/compiler/brw_fs.cpp
> @@ -454,6 +454,10 @@ type_size_scalar(const struct glsl_type *type)
>     case GLSL_TYPE_FLOAT:
>     case GLSL_TYPE_BOOL:
>        return type->components();
> +   case GLSL_TYPE_UINT16:
> +   case GLSL_TYPE_INT16:
> +   case GLSL_TYPE_FLOAT16:
> +      return DIV_ROUND_UP(type->components(), 2);
>     case GLSL_TYPE_DOUBLE:
>     case GLSL_TYPE_UINT64:
>     case GLSL_TYPE_INT64:
> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
> index 8f3f77f89a..cca4b45ae6 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -843,12 +843,18 @@ brw_type_for_nir_type(const struct gen_device_info *devinfo, nir_alu_type type)
>     case nir_type_float:
>     case nir_type_float32:
>        return BRW_REGISTER_TYPE_F;
> +   case nir_type_float16:
> +      return BRW_REGISTER_TYPE_HF;
>     case nir_type_float64:
>        return BRW_REGISTER_TYPE_DF;
>     case nir_type_int64:
>        return devinfo->gen < 8 ? BRW_REGISTER_TYPE_DF : BRW_REGISTER_TYPE_Q;
>     case nir_type_uint64:
>        return devinfo->gen < 8 ? BRW_REGISTER_TYPE_DF : BRW_REGISTER_TYPE_UQ;
> +   case nir_type_int16:
> +      return BRW_REGISTER_TYPE_W;
> +   case nir_type_uint16:
> +      return BRW_REGISTER_TYPE_UW;
>     default:
>        unreachable("unknown type");
>     }
> @@ -867,6 +873,9 @@ brw_glsl_base_type_for_nir_type(nir_alu_type type)
>     case nir_type_float32:
>        return GLSL_TYPE_FLOAT;
>  
> +   case nir_type_float16:
> +      return GLSL_TYPE_FLOAT16;
> +
>     case nir_type_float64:
>        return GLSL_TYPE_DOUBLE;
>  
> @@ -878,6 +887,13 @@ brw_glsl_base_type_for_nir_type(nir_alu_type type)
>     case nir_type_uint32:
>        return GLSL_TYPE_UINT;
>  
> +   case nir_type_int16:
> +      return GLSL_TYPE_INT16;
> +
> +   case nir_type_uint16:
> +      return GLSL_TYPE_UINT16;
> +
> +

Extra newline.

>     default:
>        unreachable("bad type");
>     }
> diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp
> index ba61481a0a..aa9e5f3d28 100644
> --- a/src/intel/compiler/brw_shader.cpp
> +++ b/src/intel/compiler/brw_shader.cpp
> @@ -34,14 +34,20 @@ enum brw_reg_type
>  brw_type_for_base_type(const struct glsl_type *type)
>  {
>     switch (type->base_type) {
> +   case GLSL_TYPE_FLOAT16:
> +      return BRW_REGISTER_TYPE_HF;
>     case GLSL_TYPE_FLOAT:
>        return BRW_REGISTER_TYPE_F;
>     case GLSL_TYPE_INT:
>     case GLSL_TYPE_BOOL:
>     case GLSL_TYPE_SUBROUTINE:
>        return BRW_REGISTER_TYPE_D;
> +   case GLSL_TYPE_INT16:
> +      return BRW_REGISTER_TYPE_W;
>     case GLSL_TYPE_UINT:
>        return BRW_REGISTER_TYPE_UD;
> +   case GLSL_TYPE_UINT16:
> +      return BRW_REGISTER_TYPE_UW;
>     case GLSL_TYPE_ARRAY:
>        return brw_type_for_base_type(type->fields.array);
>     case GLSL_TYPE_STRUCT:
> -- 
> 2.14.3
> 
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