[Mesa-dev] [PATCH v4 27/44] i965/fs: Predicate byte scattered writes if needed

[Jason Ekstrand]

Please put this one somewhere before we turn the extension on in anv as
it's needed for correctness.

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net

On Wed, Nov 29, 2017 at 6:57 PM, Jose Maria Casanova Crespo <
jmcasanova at igalia.com> wrote:

> From: Alejandro Piñeiro <apinheiro at igalia.com>
>
> While on Untyped Surface messages the bits of the execution mask are
> ANDed with the corresponding bits of the Pixel/Sample Mask, that is
> not the case for byte scattered writes. That is needed to avoid ssbo
> stores writing on helper invocations. So when that can affect, we load
> the sample mask, and predicate the send message.
>
> Note: the need for this patch was tested with a custom test. Right now
> the 16 bit storage CTS tests doesnt need this path in order to get a
> full pass.
>

Is that a CTS test, crucible test, or something else?  It would be good to
get it landed into some upstream test suite.


> ---
>  src/intel/compiler/brw_fs_nir.cpp | 14 +++++++++++++-
>  1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index 2c344ec7df..fa7aa9c247 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -4167,12 +4167,24 @@ fs_visitor::nir_emit_intrinsic(const fs_builder
> &bld, nir_intrinsic_instr *instr
>               * to rely on byte scattered in order to write 16-bit
> elements.
>               * The byte_scattered_write message needs that every written
> 16-bit
>               * type to be aligned 32-bits (stride=2).
> +             * Additionally, while on Untyped Surface messages the
> +             * bits of the execution mask are ANDed with the corresponding
> +             * bits of the Pixel/Sample Mask, that is not the case for
> byte
> +             * scattered writes. That is needed to avoid ssbo stores
> writing
> +             * on helper invocations. So when that can affect, we load the
> +             * sample mask, and predicate the send message.
>               */
> +            brw_predicate pred = BRW_PREDICATE_NONE;
> +
> +            if (stage == MESA_SHADER_FRAGMENT) {
> +               bld.emit(FS_OPCODE_MOV_DISPATCH_TO_FLAGS);
> +               pred = BRW_PREDICATE_NORMAL;
> +            }
>              emit_byte_scattered_write(bld, surf_index, offset_reg,
>                                        current_val_reg,
>                                        1 /* dims */, 1,
>                                        bit_size,
> -                                      BRW_PREDICATE_NONE);
> +                                      pred);
>           } else {
>              unsigned write_size = (length * type_size) / 4;
>              assert (write_size > 0);
> --
> 2.14.3
>
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