[Mesa-dev] [PATCH 1/2] radv: handle depth/stencil image copy with layouts better. (v2)

Dave Airlie airlied at gmail.com
Thu Dec 21 06:54:27 UTC 2017


From: Dave Airlie <airlied at redhat.com>

If we are doing a general->general transfer with HIZ enabled,
we want to hit the tile surface disable bits in radv_emit_fb_ds_state,
however we never get the current layout to know we are in general
and meta hardcoded the transfer layout which is always tile enabled.

This fixes:
dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general

v2: refactor some shared helpers for blit patches

Signed-off-by: Dave Airlie <airlied at redhat.com>
---
 src/amd/vulkan/radv_meta.h        |  1 +
 src/amd/vulkan/radv_meta_blit2d.c | 91 ++++++++++++++++++++++-----------------
 src/amd/vulkan/radv_meta_copy.c   | 20 +++++++--
 src/amd/vulkan/radv_private.h     | 22 ++++++++--
 4 files changed, 87 insertions(+), 47 deletions(-)

diff --git a/src/amd/vulkan/radv_meta.h b/src/amd/vulkan/radv_meta.h
index d10ec99413..3edf5fa646 100644
--- a/src/amd/vulkan/radv_meta.h
+++ b/src/amd/vulkan/radv_meta.h
@@ -109,6 +109,7 @@ struct radv_meta_blit2d_surf {
 	unsigned level;
 	unsigned layer;
 	VkImageAspectFlags aspect_mask;
+	VkImageLayout current_layout;
 };
 
 struct radv_meta_blit2d_buffer {
diff --git a/src/amd/vulkan/radv_meta_blit2d.c b/src/amd/vulkan/radv_meta_blit2d.c
index 08a1bae7c6..f5f8345d79 100644
--- a/src/amd/vulkan/radv_meta_blit2d.c
+++ b/src/amd/vulkan/radv_meta_blit2d.c
@@ -201,10 +201,10 @@ bind_pipeline(struct radv_cmd_buffer *cmd_buffer,
 
 static void
 bind_depth_pipeline(struct radv_cmd_buffer *cmd_buffer,
-		    enum blit2d_src_type src_type)
+		    enum blit2d_src_type src_type, int idx)
 {
 	VkPipeline pipeline =
-		cmd_buffer->device->meta_state.blit2d.depth_only_pipeline[src_type];
+		cmd_buffer->device->meta_state.blit2d.depth_only_pipeline[idx][src_type];
 
 	radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
 			     VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
@@ -212,10 +212,10 @@ bind_depth_pipeline(struct radv_cmd_buffer *cmd_buffer,
 
 static void
 bind_stencil_pipeline(struct radv_cmd_buffer *cmd_buffer,
-		      enum blit2d_src_type src_type)
+		      enum blit2d_src_type src_type, int idx)
 {
 	VkPipeline pipeline =
-		cmd_buffer->device->meta_state.blit2d.stencil_only_pipeline[src_type];
+		cmd_buffer->device->meta_state.blit2d.stencil_only_pipeline[idx][src_type];
 
 	radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
 			     VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
@@ -278,10 +278,11 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
 
 				bind_pipeline(cmd_buffer, src_type, fs_key);
 			} else if (aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) {
+				int idx = radv_meta_blit_ds_to_type(dst->current_layout);
 				radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
 							&(VkRenderPassBeginInfo) {
 								.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
-									.renderPass = device->meta_state.blit2d.depth_only_rp,
+									.renderPass = device->meta_state.blit2d.depth_only_rp[idx],
 									.framebuffer = dst_temps.fb,
 									.renderArea = {
 									.offset = { rects[r].dst_x, rects[r].dst_y, },
@@ -292,13 +293,14 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
 										}, VK_SUBPASS_CONTENTS_INLINE);
 
 
-				bind_depth_pipeline(cmd_buffer, src_type);
+				bind_depth_pipeline(cmd_buffer, src_type, idx);
 
 			} else if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
+				int idx = radv_meta_blit_ds_to_type(dst->current_layout);
 				radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
 							&(VkRenderPassBeginInfo) {
 								.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
-									.renderPass = device->meta_state.blit2d.stencil_only_rp,
+									.renderPass = device->meta_state.blit2d.stencil_only_rp[idx],
 									.framebuffer = dst_temps.fb,
 									.renderArea = {
 									.offset = { rects[r].dst_x, rects[r].dst_y, },
@@ -309,7 +311,7 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
 										}, VK_SUBPASS_CONTENTS_INLINE);
 
 
-				bind_stencil_pipeline(cmd_buffer, src_type);
+				bind_stencil_pipeline(cmd_buffer, src_type, idx);
 			} else
 				unreachable("Processing blit2d with multiple aspects.");
 
@@ -614,10 +616,12 @@ radv_device_finish_meta_blit2d_state(struct radv_device *device)
 				       &state->alloc);
 	}
 
-	radv_DestroyRenderPass(radv_device_to_handle(device),
-			       state->blit2d.depth_only_rp, &state->alloc);
-	radv_DestroyRenderPass(radv_device_to_handle(device),
-			       state->blit2d.stencil_only_rp, &state->alloc);
+	for (unsigned j = 0; j < RADV_BLIT_DS_NUM_LAYOUTS; j++) {
+		radv_DestroyRenderPass(radv_device_to_handle(device),
+				       state->blit2d.depth_only_rp[j], &state->alloc);
+		radv_DestroyRenderPass(radv_device_to_handle(device),
+				       state->blit2d.stencil_only_rp[j], &state->alloc);
+	}
 
 	for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) {
 		radv_DestroyPipelineLayout(radv_device_to_handle(device),
@@ -633,12 +637,14 @@ radv_device_finish_meta_blit2d_state(struct radv_device *device)
 					     &state->alloc);
 		}
 
-		radv_DestroyPipeline(radv_device_to_handle(device),
-				     state->blit2d.depth_only_pipeline[src],
-				     &state->alloc);
-		radv_DestroyPipeline(radv_device_to_handle(device),
-				     state->blit2d.stencil_only_pipeline[src],
-				     &state->alloc);
+		for (unsigned j = 0; j < RADV_BLIT_DS_NUM_LAYOUTS; j++) {
+			radv_DestroyPipeline(radv_device_to_handle(device),
+					     state->blit2d.depth_only_pipeline[j][src],
+					     &state->alloc);
+			radv_DestroyPipeline(radv_device_to_handle(device),
+					     state->blit2d.stencil_only_pipeline[j][src],
+					     &state->alloc);
+		}
 	}
 }
 
@@ -809,7 +815,7 @@ blit2d_init_color_pipeline(struct radv_device *device,
 
 static VkResult
 blit2d_init_depth_only_pipeline(struct radv_device *device,
-				enum blit2d_src_type src_type)
+				enum blit2d_src_type src_type, int idx)
 {
 	VkResult result;
 	const char *name;
@@ -859,7 +865,8 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
 		},
 	};
 
-	if (!device->meta_state.blit2d.depth_only_rp) {
+	if (!device->meta_state.blit2d.depth_only_rp[idx]) {
+		VkImageLayout layout = radv_meta_blit_ds_to_layout(idx);
 		result = radv_CreateRenderPass(radv_device_to_handle(device),
 					       &(VkRenderPassCreateInfo) {
 						       .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
@@ -868,8 +875,8 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
 							       .format = VK_FORMAT_D32_SFLOAT,
 							       .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
 							       .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
-							       .initialLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,
-							       .finalLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,
+							       .initialLayout = layout,
+							       .finalLayout = layout,
 						       },
 						       .subpassCount = 1,
 						       .pSubpasses = &(VkSubpassDescription) {
@@ -880,13 +887,13 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
 						       .pResolveAttachments = NULL,
 						       .pDepthStencilAttachment = &(VkAttachmentReference) {
 							       .attachment = 0,
-							       .layout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,
+							       .layout = layout,
 						       },
 						       .preserveAttachmentCount = 1,
 						       .pPreserveAttachments = (uint32_t[]) { 0 },
 					       },
 								.dependencyCount = 0,
-						 }, &device->meta_state.alloc, &device->meta_state.blit2d.depth_only_rp);
+						 }, &device->meta_state.alloc, &device->meta_state.blit2d.depth_only_rp[idx]);
 	}
 
 	const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
@@ -945,7 +952,7 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
 		},
 		.flags = 0,
 		.layout = device->meta_state.blit2d.p_layouts[src_type],
-		.renderPass = device->meta_state.blit2d.depth_only_rp,
+		.renderPass = device->meta_state.blit2d.depth_only_rp[idx],
 		.subpass = 0,
 	};
 
@@ -957,7 +964,7 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
 					       radv_pipeline_cache_to_handle(&device->meta_state.cache),
 					       &vk_pipeline_info, &radv_pipeline_info,
 					       &device->meta_state.alloc,
-					       &device->meta_state.blit2d.depth_only_pipeline[src_type]);
+					       &device->meta_state.blit2d.depth_only_pipeline[idx][src_type]);
 
 
 	ralloc_free(vs.nir);
@@ -968,7 +975,7 @@ blit2d_init_depth_only_pipeline(struct radv_device *device,
 
 static VkResult
 blit2d_init_stencil_only_pipeline(struct radv_device *device,
-				  enum blit2d_src_type src_type)
+				  enum blit2d_src_type src_type, int idx)
 {
 	VkResult result;
 	const char *name;
@@ -1018,7 +1025,8 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
 		},
 	};
 
-	if (!device->meta_state.blit2d.stencil_only_rp) {
+	if (!device->meta_state.blit2d.stencil_only_rp[idx]) {
+		VkImageLayout layout = radv_meta_blit_ds_to_layout(idx);
 		result = radv_CreateRenderPass(radv_device_to_handle(device),
 					       &(VkRenderPassCreateInfo) {
 						       .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
@@ -1027,8 +1035,8 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
 							       .format = VK_FORMAT_S8_UINT,
 							       .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
 							       .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
-							       .initialLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,
-							       .finalLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,
+							       .initialLayout = layout,
+							       .finalLayout = layout,
 						       },
 						       .subpassCount = 1,
 						       .pSubpasses = &(VkSubpassDescription) {
@@ -1039,13 +1047,13 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
 						       .pResolveAttachments = NULL,
 						       .pDepthStencilAttachment = &(VkAttachmentReference) {
 							       .attachment = 0,
-							       .layout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,
+							       .layout = layout,
 						       },
 						       .preserveAttachmentCount = 1,
 						       .pPreserveAttachments = (uint32_t[]) { 0 },
 					       },
 								.dependencyCount = 0,
-						 }, &device->meta_state.alloc, &device->meta_state.blit2d.stencil_only_rp);
+						 }, &device->meta_state.alloc, &device->meta_state.blit2d.stencil_only_rp[idx]);
 	}
 
 	const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
@@ -1120,7 +1128,7 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
 		},
 		.flags = 0,
 		.layout = device->meta_state.blit2d.p_layouts[src_type],
-		.renderPass = device->meta_state.blit2d.stencil_only_rp,
+		.renderPass = device->meta_state.blit2d.stencil_only_rp[idx],
 		.subpass = 0,
 	};
 
@@ -1132,7 +1140,7 @@ blit2d_init_stencil_only_pipeline(struct radv_device *device,
 					       radv_pipeline_cache_to_handle(&device->meta_state.cache),
 					       &vk_pipeline_info, &radv_pipeline_info,
 					       &device->meta_state.alloc,
-					       &device->meta_state.blit2d.stencil_only_pipeline[src_type]);
+					       &device->meta_state.blit2d.stencil_only_pipeline[idx][src_type]);
 
 
 	ralloc_free(vs.nir);
@@ -1222,13 +1230,16 @@ radv_device_init_meta_blit2d_state(struct radv_device *device)
 				goto fail;
 		}
 
-		result = blit2d_init_depth_only_pipeline(device, src);
-		if (result != VK_SUCCESS)
-			goto fail;
+		for (unsigned j = 0; j < RADV_BLIT_DS_NUM_LAYOUTS; j++) {
+			result = blit2d_init_depth_only_pipeline(device, src, j);
+			if (result != VK_SUCCESS)
+				goto fail;
+			result = blit2d_init_stencil_only_pipeline(device, src, j);
+			if (result != VK_SUCCESS)
+				goto fail;
+		}
+
 
-		result = blit2d_init_stencil_only_pipeline(device, src);
-		if (result != VK_SUCCESS)
-			goto fail;
 	}
 
 	return VK_SUCCESS;
diff --git a/src/amd/vulkan/radv_meta_copy.c b/src/amd/vulkan/radv_meta_copy.c
index a42b15a01a..de784d5305 100644
--- a/src/amd/vulkan/radv_meta_copy.c
+++ b/src/amd/vulkan/radv_meta_copy.c
@@ -79,6 +79,7 @@ vk_format_for_size(int bs)
 
 static struct radv_meta_blit2d_surf
 blit_surf_for_image_level_layer(struct radv_image *image,
+				VkImageLayout layout,
 				const VkImageSubresourceLayers *subres)
 {
 	VkFormat format = image->vk_format;
@@ -97,6 +98,7 @@ blit_surf_for_image_level_layer(struct radv_image *image,
 		.layer = subres->baseArrayLayer,
 		.image = image,
 		.aspect_mask = subres->aspectMask,
+		.current_layout = layout,
 	};
 }
 
@@ -104,6 +106,7 @@ static void
 meta_copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer,
                           struct radv_buffer* buffer,
                           struct radv_image* image,
+			  VkImageLayout layout,
                           uint32_t regionCount,
                           const VkBufferImageCopy* pRegions)
 {
@@ -155,6 +158,7 @@ meta_copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer,
 		/* Create blit surfaces */
 		struct radv_meta_blit2d_surf img_bsurf =
 			blit_surf_for_image_level_layer(image,
+							layout,
 							&pRegions[r].imageSubresource);
 
 		struct radv_meta_blit2d_buffer buf_bsurf = {
@@ -214,7 +218,7 @@ void radv_CmdCopyBufferToImage(
 	RADV_FROM_HANDLE(radv_image, dest_image, destImage);
 	RADV_FROM_HANDLE(radv_buffer, src_buffer, srcBuffer);
 
-	meta_copy_buffer_to_image(cmd_buffer, src_buffer, dest_image,
+	meta_copy_buffer_to_image(cmd_buffer, src_buffer, dest_image, destImageLayout,
 				  regionCount, pRegions);
 }
 
@@ -222,6 +226,7 @@ static void
 meta_copy_image_to_buffer(struct radv_cmd_buffer *cmd_buffer,
                           struct radv_buffer* buffer,
                           struct radv_image* image,
+			  VkImageLayout layout,
                           uint32_t regionCount,
                           const VkBufferImageCopy* pRegions)
 {
@@ -266,6 +271,7 @@ meta_copy_image_to_buffer(struct radv_cmd_buffer *cmd_buffer,
 		/* Create blit surfaces */
 		struct radv_meta_blit2d_surf img_info =
 			blit_surf_for_image_level_layer(image,
+							layout,
 							&pRegions[r].imageSubresource);
 
 		struct radv_meta_blit2d_buffer buf_info = {
@@ -318,13 +324,16 @@ void radv_CmdCopyImageToBuffer(
 	RADV_FROM_HANDLE(radv_buffer, dst_buffer, destBuffer);
 
 	meta_copy_image_to_buffer(cmd_buffer, dst_buffer, src_image,
+				  srcImageLayout,
 				  regionCount, pRegions);
 }
 
 static void
 meta_copy_image(struct radv_cmd_buffer *cmd_buffer,
 		struct radv_image *src_image,
+		VkImageLayout src_image_layout,
 		struct radv_image *dest_image,
+		VkImageLayout dest_image_layout,
 		uint32_t regionCount,
 		const VkImageCopy *pRegions)
 {
@@ -351,10 +360,12 @@ meta_copy_image(struct radv_cmd_buffer *cmd_buffer,
 		/* Create blit surfaces */
 		struct radv_meta_blit2d_surf b_src =
 			blit_surf_for_image_level_layer(src_image,
+							src_image_layout,
 							&pRegions[r].srcSubresource);
 
 		struct radv_meta_blit2d_surf b_dst =
 			blit_surf_for_image_level_layer(dest_image,
+							dest_image_layout,
 							&pRegions[r].dstSubresource);
 
 		/* for DCC */
@@ -429,7 +440,9 @@ void radv_CmdCopyImage(
 	RADV_FROM_HANDLE(radv_image, src_image, srcImage);
 	RADV_FROM_HANDLE(radv_image, dest_image, destImage);
 
-	meta_copy_image(cmd_buffer, src_image, dest_image,
+	meta_copy_image(cmd_buffer,
+			src_image, srcImageLayout,
+			dest_image, destImageLayout,
 			regionCount, pRegions);
 }
 
@@ -449,6 +462,7 @@ void radv_blit_to_prime_linear(struct radv_cmd_buffer *cmd_buffer,
 	image_copy.extent.height = image->info.height;
 	image_copy.extent.depth = 1;
 
-	meta_copy_image(cmd_buffer, image, linear_image,
+	meta_copy_image(cmd_buffer, image, VK_IMAGE_LAYOUT_GENERAL, linear_image,
+			VK_IMAGE_LAYOUT_GENERAL,
 			1, &image_copy);
 }
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 47ae0342ce..36fd461fc7 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -353,6 +353,20 @@ radv_pipeline_cache_insert_shaders(struct radv_device *device,
 				   const void *const *codes,
 				   const unsigned *code_sizes);
 
+#define RADV_BLIT_DS_LAYOUT_TILE_ENABLE 0
+#define RADV_BLIT_DS_LAYOUT_TILE_DISABLE 1
+#define RADV_BLIT_DS_NUM_LAYOUTS 2
+
+static inline int radv_meta_blit_ds_to_type(VkImageLayout layout)
+{
+	return (layout == VK_IMAGE_LAYOUT_GENERAL) ? RADV_BLIT_DS_LAYOUT_TILE_DISABLE : RADV_BLIT_DS_LAYOUT_TILE_ENABLE;
+}
+
+static inline VkImageLayout radv_meta_blit_ds_to_layout(int idx)
+{
+	return idx == RADV_BLIT_DS_LAYOUT_TILE_ENABLE ? VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL : VK_IMAGE_LAYOUT_GENERAL;
+}
+
 struct radv_meta_state {
 	VkAllocationCallbacks alloc;
 
@@ -405,11 +419,11 @@ struct radv_meta_state {
 		VkDescriptorSetLayout ds_layouts[3];
 		VkPipeline pipelines[3][NUM_META_FS_KEYS];
 
-		VkRenderPass depth_only_rp;
-		VkPipeline depth_only_pipeline[3];
+		VkRenderPass depth_only_rp[RADV_BLIT_DS_NUM_LAYOUTS];
+		VkPipeline depth_only_pipeline[RADV_BLIT_DS_NUM_LAYOUTS][3];
 
-		VkRenderPass stencil_only_rp;
-		VkPipeline stencil_only_pipeline[3];
+		VkRenderPass stencil_only_rp[RADV_BLIT_DS_NUM_LAYOUTS];
+		VkPipeline stencil_only_pipeline[RADV_BLIT_DS_NUM_LAYOUTS][3];
 	} blit2d;
 
 	struct {
-- 
2.14.3



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