[Mesa-dev] [PATCH] nvc0: disable linked tsc mode in compute launch descriptor

[Samuel Pitoiset]

On 02/13/2017 05:41 PM, Ilia Mirkin wrote:
> It fixes a bunch, don't know about *all*.
> dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.*.compute.*
> gets 76/76 now.

Very nice catch!
It fixes all dEQP compute sampler fails. :-)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>

>
> On Mon, Feb 13, 2017 at 11:38 AM, Samuel Pitoiset
> <samuel.pitoiset at gmail.com> wrote:
>> Does this fix all dEQP compute sampler fails?
>>
>>
>> On 02/13/2017 05:27 PM, Ilia Mirkin wrote:
>>>
>>> Empirically, this makes things work. Presumably this was originally
>>> copied from the blob, which does make use of linked tsc mode.
>>>
>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99532
>>> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
>>> Cc: mesa-stable at lists.freedesktop.org
>>> ---
>>>  src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 1 +
>>>  src/gallium/drivers/nouveau/nvc0/nve4_compute.h | 7 +++++--
>>>  2 files changed, 6 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
>>> b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
>>> index f927aa0..db32c9b 100644
>>> --- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
>>> +++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
>>> @@ -827,6 +827,7 @@ nve4_compute_dump_launch_desc(const struct
>>> nve4_cp_launch_desc *desc)
>>>     debug_printf("barrier count: %u\n", desc->bar_alloc);
>>>     debug_printf("$r count: %u\n", desc->gpr_alloc);
>>>     debug_printf("cache split: %s\n",
>>> nve4_cache_split_name(desc->cache_split));
>>> +   debug_printf("linked tsc: %d\n", desc->linked_tsc);
>>>
>>>     for (i = 0; i < 8; ++i) {
>>>        uint64_t address;
>>> diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.h
>>> b/src/gallium/drivers/nouveau/nvc0/nve4_compute.h
>>> index b98c65d..5fe58b9 100644
>>> --- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.h
>>> +++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.h
>>> @@ -8,7 +8,10 @@ struct nve4_cp_launch_desc
>>>  {
>>>     u32 unk0[8];
>>>     u32 entry;
>>> -   u32 unk9[3];
>>> +   u32 unk9[2];
>>> +   u32 unk11_0      : 30;
>>> +   u32 linked_tsc   : 1;
>>> +   u32 unk11_31     : 1;
>>>     u32 griddim_x    : 31;
>>>     u32 unk12        : 1;
>>>     u16 griddim_y;
>>> @@ -48,7 +51,7 @@ nve4_cp_launch_desc_init_default(struct
>>> nve4_cp_launch_desc *desc)
>>>     memset(desc, 0, sizeof(*desc));
>>>
>>>     desc->unk0[7]  = 0xbc000000;
>>> -   desc->unk9[2]  = 0x44014000;
>>> +   desc->unk11_0  = 0x04014000;
>>>     desc->unk47_20 = 0x300;
>>>  }
>>>
>>>
>>