[Mesa-dev] [PATCH 07/16] i965: Add color resolve end-of-pipe-sync before switch to blit ring

[Topi Pohjolainen]

This ensures that all rendering is finished and gpu caches are
flushed out. These are paths trying to switch to blit engine.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/intel_blit.c         | 16 ++++++++++++----
 src/mesa/drivers/dri/i965/intel_copy_image.c   | 10 ++++++++--
 src/mesa/drivers/dri/i965/intel_pixel_bitmap.c |  5 ++++-
 src/mesa/drivers/dri/i965/intel_pixel_read.c   |  5 ++++-
 4 files changed, 28 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 4d4ab91..ee6800b 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -346,8 +346,12 @@ intel_miptree_blit(struct brw_context *brw,
     */
    intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
    intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
-   intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0);
-   intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0);
+
+   if (intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0) |
+       intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0)) {
+      brw_end_of_pipe_sync(brw);
+      brw_render_cache_set_clear(brw);
+   }
 
    if (src_flip)
       src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height;
@@ -404,8 +408,12 @@ intel_miptree_copy(struct brw_context *brw,
     */
    intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
    intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
-   intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0);
-   intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0);
+
+   if (intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0) |
+       intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0)) {
+      brw_end_of_pipe_sync(brw);
+      brw_render_cache_set_clear(brw);
+   }
 
    uint32_t src_image_x, src_image_y;
    intel_miptree_get_image_offset(src_mt, src_level, src_slice,
diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c b/src/mesa/drivers/dri/i965/intel_copy_image.c
index 85585c7..72ed18e 100644
--- a/src/mesa/drivers/dri/i965/intel_copy_image.c
+++ b/src/mesa/drivers/dri/i965/intel_copy_image.c
@@ -129,17 +129,23 @@ copy_miptrees(struct brw_context *brw,
       return;
    }
 
+   bool color_resolved = false;
    /* We are now going to try and copy the texture using the blitter.  If
     * that fails, we will fall back mapping the texture and using memcpy.
     * In either case, we need to do a full resolve.
     */
    intel_miptree_all_slices_resolve_hiz(brw, src_mt);
    intel_miptree_all_slices_resolve_depth(brw, src_mt);
-   intel_miptree_all_slices_resolve_color(brw, src_mt, 0);
+   color_resolved |= intel_miptree_all_slices_resolve_color(brw, src_mt, 0);
 
    intel_miptree_all_slices_resolve_hiz(brw, dst_mt);
    intel_miptree_all_slices_resolve_depth(brw, dst_mt);
-   intel_miptree_all_slices_resolve_color(brw, dst_mt, 0);
+   color_resolved |= intel_miptree_all_slices_resolve_color(brw, dst_mt, 0);
+
+   if (color_resolved) {
+      brw_end_of_pipe_sync(brw);
+      brw_render_cache_set_clear(brw);
+   }
 
    _mesa_get_format_block_size(src_mt->format, &bw, &bh);
 
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
index 4522d28..1cdb4e7 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
@@ -256,7 +256,10 @@ do_blit_bitmap( struct gl_context *ctx,
    /* The blitter has no idea about fast color clears, so we need to resolve
     * the miptree before we do anything.
     */
-   intel_miptree_all_slices_resolve_color(brw, irb->mt, 0);
+   if (intel_miptree_all_slices_resolve_color(brw, irb->mt, 0)) {
+      brw_end_of_pipe_sync(brw);
+      brw_render_cache_set_clear(brw);
+   }
 
    /* Chop it all into chunks that can be digested by hardware: */
    for (py = 0; py < height; py += DY) {
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index 2563897..8e5e8d9 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -138,7 +138,10 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx,
    /* Since we are going to read raw data to the miptree, we need to resolve
     * any pending fast color clears before we start.
     */
-   intel_miptree_all_slices_resolve_color(brw, irb->mt, 0);
+   if (intel_miptree_all_slices_resolve_color(brw, irb->mt, 0)) {
+      brw_end_of_pipe_sync(brw);
+      brw_render_cache_set_clear(brw);
+   }
 
    bo = irb->mt->bo;
 
-- 
2.5.5