[Mesa-dev] [PATCH 01/10] i965/disasm: SFID and src1 decoding for SEND/SENDC instructions in shader disassembly

[Toni Lönnberg]

From: "Lonnberg, Toni" <toni.lonnberg at intel.com>

The shader disassembly now shows the SFID field and will always output the
second source operand in the disassembled SEND and SENDC instructions.
---
 src/mesa/drivers/dri/i965/brw_disasm.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 6df3bd1..89d743e 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -1383,16 +1383,18 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
          pad(file, 48);
          err |= src1(file, devinfo, inst);
       }
-   }
 
-   if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
-      enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
-
-      if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
-         /* show the indirect descriptor source */
+      if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
          pad(file, 48);
+         format(file, "0x%"PRIx64, brw_inst_sfid(devinfo, inst));
+
+         pad(file, 64);
          err |= src1(file, devinfo, inst);
       }
+   }
+
+   if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) {
+      enum brw_message_target sfid = brw_inst_sfid(devinfo, inst);
 
       newline(file);
       pad(file, 16);
-- 
2.7.4