[Mesa-dev] [PATCH 13/24] radeonsi: move kill intrinsic building into amd/common

Marek Olšák maraeo at gmail.com
Sat Feb 25 23:58:11 UTC 2017


From: Marek Olšák <marek.olsak at amd.com>

just a cleanup
---
 src/amd/common/ac_llvm_build.c                    | 16 ++++++++++++++++
 src/amd/common/ac_llvm_build.h                    |  1 +
 src/gallium/drivers/radeonsi/si_shader.c          | 12 ++++--------
 src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 14 ++++++++------
 4 files changed, 29 insertions(+), 14 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index f0ab9cb..a569a7c 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -1098,10 +1098,26 @@ LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
 			ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
 					       v2f16, args, 2,
 					       AC_FUNC_ATTR_READNONE);
 		return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
 	}
 
 	return ac_emit_llvm_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
 				      AC_FUNC_ATTR_READNONE |
 				      AC_FUNC_ATTR_LEGACY);
 }
+
+/**
+ * KILL, AKA discard in GLSL.
+ *
+ * \param value  kill if value < 0.0 or value == NULL.
+ */
+void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
+{
+	if (value) {
+		ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
+				       &value, 1, AC_FUNC_ATTR_LEGACY);
+	} else {
+		ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kilp", ctx->voidt,
+				       NULL, 0, AC_FUNC_ATTR_LEGACY);
+	}
+}
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index e6e4e43..af16a2b 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -229,16 +229,17 @@ struct ac_image_args {
 	LLVMValueRef addr;
 	unsigned dmask;
 	bool unorm;
 	bool da;
 };
 
 LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
 				  struct ac_image_args *a);
 LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
 				   LLVMValueRef args[2]);
+void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value);
 
 #ifdef __cplusplus
 }
 #endif
 
 #endif
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 999aa40..caff95b 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1933,25 +1933,23 @@ static void si_alpha_test(struct lp_build_tgsi_context *bld_base,
 		LLVMValueRef alpha_pass =
 			lp_build_cmp(&bld_base->base,
 				     ctx->shader->key.part.ps.epilog.alpha_func,
 				     alpha, alpha_ref);
 		LLVMValueRef arg =
 			lp_build_select(&bld_base->base,
 					alpha_pass,
 					lp_build_const_float(gallivm, 1.0f),
 					lp_build_const_float(gallivm, -1.0f));
 
-		lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.kill",
-				   ctx->voidt, &arg, 1, LP_FUNC_ATTR_LEGACY);
+		ac_emit_kill(&ctx->ac, arg);
 	} else {
-		lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.kilp",
-				   ctx->voidt, NULL, 0, LP_FUNC_ATTR_LEGACY);
+		ac_emit_kill(&ctx->ac, NULL);
 	}
 }
 
 static LLVMValueRef si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context *bld_base,
 						  LLVMValueRef alpha,
 						  unsigned samplemask_param)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	struct gallivm_state *gallivm = bld_base->base.gallivm;
 	LLVMValueRef coverage;
@@ -5026,22 +5024,21 @@ static void si_llvm_emit_vertex(
 	can_emit = LLVMBuildICmp(gallivm->builder, LLVMIntULT, gs_next_vertex,
 				 lp_build_const_int32(gallivm,
 						      shader->selector->gs_max_out_vertices), "");
 
 	bool use_kill = !info->writes_memory;
 	if (use_kill) {
 		kill = lp_build_select(&bld_base->base, can_emit,
 				       lp_build_const_float(gallivm, 1.0f),
 				       lp_build_const_float(gallivm, -1.0f));
 
-		lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.kill",
-				   ctx->voidt, &kill, 1, LP_FUNC_ATTR_LEGACY);
+		ac_emit_kill(&ctx->ac, kill);
 	} else {
 		lp_build_if(&if_state, gallivm, can_emit);
 	}
 
 	offset = 0;
 	for (i = 0; i < info->num_outputs; i++) {
 		LLVMValueRef *out_ptr = ctx->outputs[i];
 
 		for (chan = 0; chan < 4; chan++) {
 			if (!(info->output_usagemask[i] & (1 << chan)) ||
@@ -5651,22 +5648,21 @@ static void si_llvm_emit_polygon_stipple(struct si_shader_context *ctx,
 	offset = LLVMBuildMul(builder, address[1],
 			      LLVMConstInt(ctx->i32, 4, 0), "");
 	row = buffer_load_const(ctx, desc, offset);
 	row = LLVMBuildBitCast(builder, row, ctx->i32, "");
 	bit = LLVMBuildLShr(builder, row, address[0], "");
 	bit = LLVMBuildTrunc(builder, bit, ctx->i1, "");
 
 	/* The intrinsic kills the thread if arg < 0. */
 	bit = LLVMBuildSelect(builder, bit, LLVMConstReal(ctx->f32, 0),
 			      LLVMConstReal(ctx->f32, -1), "");
-	lp_build_intrinsic(builder, "llvm.AMDGPU.kill", ctx->voidt, &bit, 1,
-			   LP_FUNC_ATTR_LEGACY);
+	ac_emit_kill(&ctx->ac, bit);
 }
 
 void si_shader_binary_read_config(struct radeon_shader_binary *binary,
 				  struct si_shader_config *conf,
 				  unsigned symbol_offset)
 {
 	unsigned i;
 	const unsigned char *config =
 		radeon_shader_binary_config_start(binary, symbol_offset);
 	bool really_needs_scratch = false;
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index ee59fed..d80848e 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -19,20 +19,21 @@
  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #include "si_shader_internal.h"
 #include "gallivm/lp_bld_const.h"
 #include "gallivm/lp_bld_intr.h"
 #include "gallivm/lp_bld_gather.h"
 #include "tgsi/tgsi_parse.h"
+#include "amd/common/ac_llvm_build.h"
 
 static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
 			       struct lp_build_emit_data *emit_data)
 {
 	const struct tgsi_full_instruction *inst = emit_data->inst;
 	struct gallivm_state *gallivm = bld_base->base.gallivm;
 	LLVMBuilderRef builder = gallivm->builder;
 	unsigned i;
 	LLVMValueRef conds[TGSI_NUM_CHANNELS];
 
@@ -51,23 +52,26 @@ static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
 	emit_data->arg_count = 1;
 	emit_data->args[0] = LLVMBuildSelect(builder, conds[0],
 					lp_build_const_float(gallivm, -1.0f),
 					bld_base->base.zero, "");
 }
 
 static void kil_emit(const struct lp_build_tgsi_action *action,
 		     struct lp_build_tgsi_context *bld_base,
 		     struct lp_build_emit_data *emit_data)
 {
-	lp_build_intrinsic(bld_base->base.gallivm->builder,
-			   action->intr_name, emit_data->dst_type,
-			   &emit_data->args[0], 1, LP_FUNC_ATTR_LEGACY);
+	struct si_shader_context *ctx = si_shader_context(bld_base);
+
+	if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF)
+		ac_emit_kill(&ctx->ac, emit_data->args[0]);
+	else
+		ac_emit_kill(&ctx->ac, NULL);
 }
 
 static void emit_icmp(const struct lp_build_tgsi_action *action,
 		      struct lp_build_tgsi_context *bld_base,
 		      struct lp_build_emit_data *emit_data)
 {
 	unsigned pred;
 	LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 	LLVMContextRef context = bld_base->base.gallivm->context;
 
@@ -772,23 +776,21 @@ void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
 	bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int;
 	bld_base->op_actions[TGSI_OPCODE_IMSB].emit = emit_imsb;
 	bld_base->op_actions[TGSI_OPCODE_INEG].emit = emit_ineg;
 	bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr;
 	bld_base->op_actions[TGSI_OPCODE_ISGE].emit = emit_icmp;
 	bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp;
 	bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg;
 	bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f;
 	bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args = kill_if_fetch_args;
 	bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit;
-	bld_base->op_actions[TGSI_OPCODE_KILL_IF].intr_name = "llvm.AMDGPU.kill";
-	bld_base->op_actions[TGSI_OPCODE_KILL].emit = lp_build_tgsi_intrinsic;
-	bld_base->op_actions[TGSI_OPCODE_KILL].intr_name = "llvm.AMDGPU.kilp";
+	bld_base->op_actions[TGSI_OPCODE_KILL].emit = kil_emit;
 	bld_base->op_actions[TGSI_OPCODE_LSB].emit = emit_lsb;
 	bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_nomem;
 	bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
 	bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
 	bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32";
 	bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
 	bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
 	bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod;
 	bld_base->op_actions[TGSI_OPCODE_UMSB].emit = emit_umsb;
 	bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not;
-- 
2.7.4



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