[Mesa-dev] [PATCH 6/9] radeonsi: don't count fast clears and prefetches into CP DMA stats
Bas Nieuwenhuizen
bas at basnieuwenhuizen.nl
Mon Jan 2 22:17:32 UTC 2017
On Mon, Jan 2, 2017 at 9:17 PM, Marek Olšák <maraeo at gmail.com> wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> ---
> src/gallium/drivers/radeonsi/si_cp_dma.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
> index 5809317..fd772c5 100644
> --- a/src/gallium/drivers/radeonsi/si_cp_dma.c
> +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
> @@ -208,21 +208,23 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
> /* Emit the clear packet. */
> si_emit_cp_dma(sctx, va, value, byte_count, dma_flags, coher);
>
> size -= byte_count;
> va += byte_count;
> }
>
> if (tc_l2_flag)
> r600_resource(dst)->TC_L2_dirty = true;
>
> - sctx->b.num_cp_dma_calls++;
> + /* If it's not a framebuffer fast clear... */
> + if (coher == R600_COHERENCY_SHADER)
> + sctx->b.num_cp_dma_calls++;
> }
>
> /**
> * Realign the CP DMA engine. This must be done after a copy with an unaligned
> * size.
> *
> * \param size Remaining size to the CP DMA alignment.
> */
> static void si_cp_dma_realign_engine(struct si_context *sctx, unsigned size)
> {
> @@ -334,17 +336,19 @@ void si_copy_buffer(struct si_context *sctx,
> dma_flags, R600_COHERENCY_SHADER);
> }
>
> /* Finally, realign the engine if the size wasn't aligned. */
> if (realign_size)
> si_cp_dma_realign_engine(sctx, realign_size);
>
> if (tc_l2_flag)
> r600_resource(dst)->TC_L2_dirty = true;
>
> - sctx->b.num_cp_dma_calls++;
> + /* If it's not a prefetch... */
> + if (dst_offset != src_offset)
> + sctx->b.num_cp_dma_calls++;
And src != dst ?
> }
>
> void si_init_cp_dma_functions(struct si_context *sctx)
> {
> sctx->b.clear_buffer = si_clear_buffer;
> }
> --
> 2.7.4
>
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