[Mesa-dev] [PATCH 12/53] i965: stop passing gl_shader_program to brw_nir_setup_glsl_uniforms()
Lionel Landwerlin
lionel.g.landwerlin at intel.com
Tue Jan 3 17:39:48 UTC 2017
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
On 03/01/17 02:43, Timothy Arceri wrote:
> We can now just get the data needed from the gl_shader_program_data
> pointer in gl_program.
> ---
> src/mesa/drivers/dri/i965/brw_cs.c | 4 ++--
> src/mesa/drivers/dri/i965/brw_gs.c | 2 +-
> src/mesa/drivers/dri/i965/brw_nir.h | 1 -
> src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 14 ++++++--------
> src/mesa/drivers/dri/i965/brw_tcs.c | 3 +--
> src/mesa/drivers/dri/i965/brw_tes.c | 3 +--
> src/mesa/drivers/dri/i965/brw_vs.c | 2 +-
> src/mesa/drivers/dri/i965/brw_wm.c | 2 +-
> 8 files changed, 13 insertions(+), 18 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965/brw_cs.c
> index 8658406..6882bb5 100644
> --- a/src/mesa/drivers/dri/i965/brw_cs.c
> +++ b/src/mesa/drivers/dri/i965/brw_cs.c
> @@ -103,8 +103,8 @@ brw_codegen_cs_prog(struct brw_context *brw,
> prog_data.base.nr_params = param_count;
> prog_data.base.nr_image_params = cp->program.info.num_images;
>
> - brw_nir_setup_glsl_uniforms(cp->program.nir, prog, &cp->program,
> - &prog_data.base, true);
> + brw_nir_setup_glsl_uniforms(cp->program.nir, &cp->program,&prog_data.base,
> + true);
>
> if (unlikely(brw->perf_debug)) {
> start_busy = (brw->batch.last_bo &&
> diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
> index 5896726..d6dd926 100644
> --- a/src/mesa/drivers/dri/i965/brw_gs.c
> +++ b/src/mesa/drivers/dri/i965/brw_gs.c
> @@ -124,7 +124,7 @@ brw_codegen_gs_prog(struct brw_context *brw,
> prog_data.base.base.nr_params = param_count;
> prog_data.base.base.nr_image_params = gp->program.info.num_images;
>
> - brw_nir_setup_glsl_uniforms(gp->program.nir, prog, &gp->program,
> + brw_nir_setup_glsl_uniforms(gp->program.nir, &gp->program,
> &prog_data.base.base,
> compiler->scalar_stage[MESA_SHADER_GEOMETRY]);
>
> diff --git a/src/mesa/drivers/dri/i965/brw_nir.h b/src/mesa/drivers/dri/i965/brw_nir.h
> index 8cfb6c1..a7189c1 100644
> --- a/src/mesa/drivers/dri/i965/brw_nir.h
> +++ b/src/mesa/drivers/dri/i965/brw_nir.h
> @@ -135,7 +135,6 @@ enum brw_reg_type brw_type_for_nir_type(nir_alu_type type);
> enum glsl_base_type brw_glsl_base_type_for_nir_type(nir_alu_type type);
>
> void brw_nir_setup_glsl_uniforms(nir_shader *shader,
> - struct gl_shader_program *shader_prog,
> const struct gl_program *prog,
> struct brw_stage_prog_data *stage_prog_data,
> bool is_scalar);
> diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
> index 15a608c..57682e8 100644
> --- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
> @@ -68,7 +68,7 @@ brw_nir_setup_glsl_builtin_uniform(nir_variable *var,
>
> static void
> brw_nir_setup_glsl_uniform(gl_shader_stage stage, nir_variable *var,
> - struct gl_shader_program *shader_prog,
> + const struct gl_program *prog,
> struct brw_stage_prog_data *stage_prog_data,
> bool is_scalar)
> {
> @@ -81,9 +81,9 @@ brw_nir_setup_glsl_uniform(gl_shader_stage stage, nir_variable *var,
> * with our name, or the prefix of a component that starts with our name.
> */
> unsigned uniform_index = var->data.driver_location / 4;
> - for (unsigned u = 0; u < shader_prog->data->NumUniformStorage; u++) {
> + for (unsigned u = 0; u < prog->sh.data->NumUniformStorage; u++) {
> struct gl_uniform_storage *storage =
> - &shader_prog->data->UniformStorage[u];
> + &prog->sh.data->UniformStorage[u];
>
> if (storage->builtin)
> continue;
> @@ -130,9 +130,7 @@ brw_nir_setup_glsl_uniform(gl_shader_stage stage, nir_variable *var,
> }
>
> void
> -brw_nir_setup_glsl_uniforms(nir_shader *shader,
> - struct gl_shader_program *shader_prog,
> - const struct gl_program *prog,
> +brw_nir_setup_glsl_uniforms(nir_shader *shader, const struct gl_program *prog,
> struct brw_stage_prog_data *stage_prog_data,
> bool is_scalar)
> {
> @@ -146,8 +144,8 @@ brw_nir_setup_glsl_uniforms(nir_shader *shader,
> brw_nir_setup_glsl_builtin_uniform(var, prog, stage_prog_data,
> is_scalar);
> } else {
> - brw_nir_setup_glsl_uniform(shader->stage, var, shader_prog,
> - stage_prog_data, is_scalar);
> + brw_nir_setup_glsl_uniform(shader->stage, var, prog, stage_prog_data,
> + is_scalar);
> }
> }
> }
> diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
> index 0978776..822437e 100644
> --- a/src/mesa/drivers/dri/i965/brw_tcs.c
> +++ b/src/mesa/drivers/dri/i965/brw_tcs.c
> @@ -219,8 +219,7 @@ brw_codegen_tcs_prog(struct brw_context *brw,
> tcp->program.info.num_images);
> prog_data.base.base.nr_image_params = tcp->program.info.num_images;
>
> - brw_nir_setup_glsl_uniforms(nir, shader_prog, &tcp->program,
> - &prog_data.base.base,
> + brw_nir_setup_glsl_uniforms(nir, &tcp->program, &prog_data.base.base,
> compiler->scalar_stage[MESA_SHADER_TESS_CTRL]);
> } else {
> /* Upload the Patch URB Header as the first two uniforms.
> diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
> index 520963b..464dbde 100644
> --- a/src/mesa/drivers/dri/i965/brw_tes.c
> +++ b/src/mesa/drivers/dri/i965/brw_tes.c
> @@ -161,8 +161,7 @@ brw_codegen_tes_prog(struct brw_context *brw,
> prog_data.base.base.nr_params = param_count;
> prog_data.base.base.nr_image_params = tep->program.info.num_images;
>
> - brw_nir_setup_glsl_uniforms(nir, shader_prog, &tep->program,
> - &prog_data.base.base,
> + brw_nir_setup_glsl_uniforms(nir, &tep->program, &prog_data.base.base,
> compiler->scalar_stage[MESA_SHADER_TESS_EVAL]);
>
> int st_index = -1;
> diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
> index 3961375..c08be1f 100644
> --- a/src/mesa/drivers/dri/i965/brw_vs.c
> +++ b/src/mesa/drivers/dri/i965/brw_vs.c
> @@ -188,7 +188,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
> stage_prog_data->nr_params = param_count;
>
> if (prog) {
> - brw_nir_setup_glsl_uniforms(vp->program.nir, prog, &vp->program,
> + brw_nir_setup_glsl_uniforms(vp->program.nir, &vp->program,
> &prog_data.base.base,
> compiler->scalar_stage[MESA_SHADER_VERTEX]);
> } else {
> diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
> index 674678f..e6576c2 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm.c
> @@ -175,7 +175,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
> prog_data.base.nr_params = param_count;
>
> if (prog) {
> - brw_nir_setup_glsl_uniforms(fp->program.nir, prog, &fp->program,
> + brw_nir_setup_glsl_uniforms(fp->program.nir, &fp->program,
> &prog_data.base, true);
> } else {
> brw_nir_setup_arb_uniforms(fp->program.nir, &fp->program,
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