[Mesa-dev] [PATCH v2 5/5] radv: Create single RADV_DEBUG env var.

Bas Nieuwenhuizen bas at basnieuwenhuizen.nl
Tue Jan 3 22:06:30 UTC 2017


Also changed RADV_SHOW_QUEUES to a no compute queue option. That
would make more sense later when the compute queue is established,
but the transfer queue still experimental.

v2: Don't include the trace flag.

Signed-off-by: Bas Nieuwenhuizen <basni at google.com>
---
 src/amd/vulkan/radv_device.c         | 45 +++++++++++++++++++++---------------
 src/amd/vulkan/radv_image.c          |  4 ++--
 src/amd/vulkan/radv_meta_clear.c     |  2 +-
 src/amd/vulkan/radv_pipeline.c       | 18 +++++++--------
 src/amd/vulkan/radv_pipeline_cache.c |  2 +-
 src/amd/vulkan/radv_private.h        | 18 ++++++++++++---
 6 files changed, 53 insertions(+), 36 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index ef8ca1a375..05d8888ac8 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -218,6 +218,18 @@ static const VkAllocationCallbacks default_alloc = {
 	.pfnFree = default_free_func,
 };
 
+static const struct debug_control radv_debug_options[] = {
+	{"fastclears", RADV_DEBUG_FAST_CLEARS},
+	{"nodcc", RADV_DEBUG_NO_DCC},
+	{"shaders", RADV_DEBUG_DUMP_SHADERS},
+	{"nocache", RADV_DEBUG_NO_CACHE},
+	{"shaderstats", RADV_DEBUG_DUMP_SHADER_STATS},
+	{"nohiz", RADV_DEBUG_NO_HIZ},
+	{"nocompute", RADV_DEBUG_NO_COMPUTE_QUEUE},
+	{"unsafemath", RADV_DEBUG_UNSAFE_MATH},
+	{NULL, 0}
+};
+
 VkResult radv_CreateInstance(
 	const VkInstanceCreateInfo*                 pCreateInfo,
 	const VkAllocationCallbacks*                pAllocator,
@@ -276,6 +288,9 @@ VkResult radv_CreateInstance(
 
 	VG(VALGRIND_CREATE_MEMPOOL(instance, 0, false));
 
+	instance->debug_flags = parse_debug_string(getenv("RADV_DEBUG"),
+						   radv_debug_options);
+
 	*pInstance = radv_instance_to_handle(instance);
 
 	return VK_SUCCESS;
@@ -555,12 +570,11 @@ void radv_GetPhysicalDeviceQueueFamilyProperties(
 {
 	RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
 	int num_queue_families = 1;
-	bool all_queues = env_var_as_boolean("RADV_SHOW_QUEUES", true);
 	int idx;
-	if (all_queues && pdevice->rad_info.chip_class >= CIK) {
-		if (pdevice->rad_info.compute_rings > 0)
-			num_queue_families++;
-	}
+	if (pdevice->rad_info.compute_rings > 0 &&
+	    pdevice->rad_info.chip_class >= CIK &&
+	    !(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE))
+		num_queue_families++;
 
 	if (pQueueFamilyProperties == NULL) {
 		*pCount = num_queue_families;
@@ -583,12 +597,9 @@ void radv_GetPhysicalDeviceQueueFamilyProperties(
 		idx++;
 	}
 
-	if (!all_queues) {
-		*pCount = idx;
-		return;
-	}
-
-	if (pdevice->rad_info.compute_rings > 0 && pdevice->rad_info.chip_class >= CIK) {
+	if (pdevice->rad_info.compute_rings > 0 &&
+	    pdevice->rad_info.chip_class >= CIK &&
+	    !(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE)) {
 		if (*pCount > idx) {
 			pQueueFamilyProperties[idx] = (VkQueueFamilyProperties) {
 				.queueFlags = VK_QUEUE_COMPUTE_BIT | VK_QUEUE_TRANSFER_BIT,
@@ -699,7 +710,8 @@ VkResult radv_CreateDevice(
 
 	device->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
 	device->instance = physical_device->instance;
-	device->shader_stats_dump = false;
+
+	device->debug_flags = device->instance->debug_flags;
 
 	device->ws = physical_device->ws;
 	if (pAllocator)
@@ -735,12 +747,6 @@ VkResult radv_CreateDevice(
 		device->ws->ctx_destroy(device->hw_ctx);
 		goto fail;
 	}
-	device->allow_fast_clears = env_var_as_boolean("RADV_FAST_CLEARS", false);
-	device->allow_dcc = !env_var_as_boolean("RADV_DCC_DISABLE", false);
-	device->shader_stats_dump = env_var_as_boolean("RADV_SHADER_STATS", false);
-
-	if (device->allow_fast_clears && device->allow_dcc)
-		radv_finishme("DCC fast clears have not been tested\n");
 
 	radv_device_init_msaa(device);
 
@@ -1652,7 +1658,8 @@ radv_initialise_color_surface(struct radv_device *device,
 		if (iview->image->fmask.size)
 			cb->cb_color_info |= S_028C70_COMPRESSION(1);
 
-	if (iview->image->cmask.size && device->allow_fast_clears)
+	if (iview->image->cmask.size &&
+	    (device->debug_flags & RADV_DEBUG_FAST_CLEARS))
 		cb->cb_color_info |= S_028C70_FAST_CLEAR(1);
 
 	if (iview->image->surface.dcc_size && level_info->dcc_enabled)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 9c0bba2165..2a41c8e323 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -113,7 +113,7 @@ radv_init_surface(struct radv_device *device,
 	    (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) ||
             (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) ||
             device->instance->physicalDevice.rad_info.chip_class < VI ||
-            create_info->scanout || !device->allow_dcc ||
+            create_info->scanout || (device->debug_flags & RADV_DEBUG_NO_DCC) ||
             !radv_is_colorbuffer_format_supported(pCreateInfo->format, &blendable))
 		surface->flags |= RADEON_SURF_DISABLE_DCC;
 	if (create_info->scanout)
@@ -649,7 +649,7 @@ static void
 radv_image_alloc_htile(struct radv_device *device,
 		       struct radv_image *image)
 {
-	if (env_var_as_boolean("RADV_HIZ_DISABLE", false))
+	if (device->debug_flags & RADV_DEBUG_NO_HIZ)
 		return;
 
 	image->htile.size = radv_image_get_htile_size(device, image);
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index cb2aa1aa72..4cee75e6f0 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -802,7 +802,7 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
 	if (!iview->image->cmask.size && !iview->image->surface.dcc_size)
 		return false;
 
-	if (!cmd_buffer->device->allow_fast_clears)
+	if (!(cmd_buffer->device->debug_flags & RADV_DEBUG_FAST_CLEARS))
 		return false;
 
 	if (!radv_layout_can_fast_clear(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index)))
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 75785ec921..bbbc90a711 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -415,7 +415,7 @@ static struct radv_shader_variant *radv_shader_variant_create(struct radv_device
 
 	struct ac_shader_binary binary;
 
-	options.unsafe_math = env_var_as_boolean("RADV_UNSAFE_MATH", false);
+	options.unsafe_math = !!(device->debug_flags & RADV_DEBUG_UNSAFE_MATH);
 	options.family = chip_family;
 	options.chip_class = device->instance->physicalDevice.rad_info.chip_class;
 	tm = ac_create_target_machine(chip_family);
@@ -448,14 +448,14 @@ radv_pipeline_compile(struct radv_pipeline *pipeline,
 		      gl_shader_stage stage,
 		      const VkSpecializationInfo *spec_info,
 		      struct radv_pipeline_layout *layout,
-		      const union ac_shader_variant_key *key,
-		      bool dump)
+		      const union ac_shader_variant_key *key)
 {
 	unsigned char sha1[20];
 	struct radv_shader_variant *variant;
 	nir_shader *nir;
 	void *code = NULL;
 	unsigned code_size = 0;
+	bool dump = (pipeline->device->debug_flags & RADV_DEBUG_DUMP_SHADERS);
 
 	if (module->nir)
 		_mesa_sha1_compute(module->nir->info->name,
@@ -1307,7 +1307,6 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
 {
 	struct radv_shader_module fs_m = {0};
 
-	bool dump = getenv("RADV_DUMP_SHADERS");
 	if (alloc == NULL)
 		alloc = &device->alloc;
 
@@ -1334,7 +1333,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
 					       pStages[MESA_SHADER_VERTEX]->pName,
 					       MESA_SHADER_VERTEX,
 					       pStages[MESA_SHADER_VERTEX]->pSpecializationInfo,
-					       pipeline->layout, &key, dump);
+					       pipeline->layout, &key);
 
 		pipeline->active_stages |= mesa_to_vk_shader_stage(MESA_SHADER_VERTEX);
 	}
@@ -1359,7 +1358,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
 					       stage ? stage->pName : "main",
 					       MESA_SHADER_FRAGMENT,
 					       stage ? stage->pSpecializationInfo : NULL,
-					       pipeline->layout, &key, dump);
+					       pipeline->layout, &key);
 		pipeline->active_stages |= mesa_to_vk_shader_stage(MESA_SHADER_FRAGMENT);
 	}
 
@@ -1411,7 +1410,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
 		pipeline->binding_stride[desc->binding] = desc->stride;
 	}
 
-	if (device->shader_stats_dump) {
+	if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) {
 		radv_dump_pipeline_stats(device, pipeline);
 	}
 
@@ -1487,7 +1486,6 @@ static VkResult radv_compute_pipeline_create(
 	RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
 	RADV_FROM_HANDLE(radv_shader_module, module, pCreateInfo->stage.module);
 	struct radv_pipeline *pipeline;
-	bool dump = getenv("RADV_DUMP_SHADERS");
 
 	pipeline = vk_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8,
 			       VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
@@ -1503,11 +1501,11 @@ static VkResult radv_compute_pipeline_create(
 				       pCreateInfo->stage.pName,
 				       MESA_SHADER_COMPUTE,
 				       pCreateInfo->stage.pSpecializationInfo,
-				       pipeline->layout, NULL, dump);
+				       pipeline->layout, NULL);
 
 	*pPipeline = radv_pipeline_to_handle(pipeline);
 
-	if (device->shader_stats_dump) {
+	if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) {
 		radv_dump_pipeline_stats(device, pipeline);
 	}
 	return VK_SUCCESS;
diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c
index db824a2630..4fd09beb63 100644
--- a/src/amd/vulkan/radv_pipeline_cache.c
+++ b/src/amd/vulkan/radv_pipeline_cache.c
@@ -57,7 +57,7 @@ radv_pipeline_cache_init(struct radv_pipeline_cache *cache,
 	/* We don't consider allocation failure fatal, we just start with a 0-sized
 	 * cache. */
 	if (cache->hash_table == NULL ||
-	    !env_var_as_boolean("RADV_ENABLE_PIPELINE_CACHE", true))
+	    (device->debug_flags & RADV_DEBUG_NO_CACHE))
 		cache->table_size = 0;
 	else
 		memset(cache->hash_table, 0, byte_size);
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 9bae7494a9..34eb2b1e4e 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -100,6 +100,18 @@ enum radv_mem_type {
 	RADV_MEM_TYPE_COUNT
 };
 
+
+enum {
+	RADV_DEBUG_FAST_CLEARS       =   0x1,
+	RADV_DEBUG_NO_DCC            =   0x2,
+	RADV_DEBUG_DUMP_SHADERS      =   0x4,
+	RADV_DEBUG_NO_CACHE          =   0x8,
+	RADV_DEBUG_DUMP_SHADER_STATS =  0x10,
+	RADV_DEBUG_NO_HIZ            =  0x20,
+	RADV_DEBUG_NO_COMPUTE_QUEUE  =  0x40,
+	RADV_DEBUG_UNSAFE_MATH       =  0x80,
+};
+
 #define radv_noreturn __attribute__((__noreturn__))
 #define radv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
 
@@ -284,6 +296,8 @@ struct radv_instance {
 	uint32_t                                    apiVersion;
 	int                                         physicalDeviceCount;
 	struct radv_physical_device                  physicalDevice;
+
+	uint64_t debug_flags;
 };
 
 VkResult radv_init_wsi(struct radv_physical_device *physical_device);
@@ -475,9 +489,7 @@ struct radv_device {
 	int queue_count[RADV_MAX_QUEUE_FAMILIES];
 	struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES];
 
-	bool allow_fast_clears;
-	bool allow_dcc;
-	bool shader_stats_dump;
+	uint64_t debug_flags;
 
 	/* MSAA sample locations.
 	 * The first index is the sample index.
-- 
2.11.0



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