[Mesa-dev] [PATCH 08/22] i965/fs: fix lower SIMD width for IVB/VLV's MOVE_INDIRECT

[Samuel Iglesias Gonsálvez]

From: "Juan A. Suarez Romero" <jasuarez at igalia.com>

Previous to Broadwell, we have 8 registers for MOV_INDIRECT. But if
IVB/VLV deal with DFs, we will duplicate the exec_size from 8 to 16.

This patch limits the SIMD width to 4 in this case.
---
 src/mesa/drivers/dri/i965/brw_fs.cpp | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index cfce364..45d320d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -4959,8 +4959,13 @@ get_lowered_simd_width(const struct gen_device_info *devinfo,
       return MIN2(8, inst->exec_size);
 
    case SHADER_OPCODE_MOV_INDIRECT:
-      /* Prior to Broadwell, we only have 8 address subregisters */
-      return MIN3(devinfo->gen >= 8 ? 16 : 8,
+      /* Prior to Broadwell, we only have 8 address subregisters. Special case
+       * for IVB/VLV and DF types: set to 4 (exec_size will be later
+       * duplicated).
+       */
+      return MIN3(devinfo->gen >= 8 ? 16 : ((devinfo->gen == 7 &&
+                                             !devinfo->is_haswell &&
+                                             inst->exec_data_size() == 8) ? 4 : 8),
                   2 * REG_SIZE / (inst->dst.stride * type_sz(inst->dst.type)),
                   inst->exec_size);
 
-- 
2.9.3