[Mesa-dev] [PATCH 42/51] i965: Pack a couple of batch booleans into a flags field

Chris Wilson chris at chris-wilson.co.uk
Tue Jan 10 21:24:05 UTC 2017


The flags field becomes more useful later as we store more bits in it,
but for now we can start it off with the pair of boolean state already
stored inside batch.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 src/mesa/drivers/dri/i965/brw_batch.h         | 5 +++--
 src/mesa/drivers/dri/i965/brw_misc_state.c    | 4 ++--
 src/mesa/drivers/dri/i965/brw_program_cache.c | 2 +-
 src/mesa/drivers/dri/i965/gen7_sol_state.c    | 2 +-
 src/mesa/drivers/dri/i965/intel_batchbuffer.c | 5 ++---
 5 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_batch.h b/src/mesa/drivers/dri/i965/brw_batch.h
index 95cdbca4fd..e67e874a8e 100644
--- a/src/mesa/drivers/dri/i965/brw_batch.h
+++ b/src/mesa/drivers/dri/i965/brw_batch.h
@@ -62,8 +62,9 @@ typedef struct brw_batch {
 
    uint32_t state_batch_offset;
    enum brw_gpu_ring ring;
-   bool needs_sol_reset;
-   bool state_base_address_emitted;
+   unsigned flags;
+#define BATCH_HAS_SOL           (1 << 0)
+#define BATCH_HAS_STATE_BASE    (1 << 1)
    int gen;
 
    jmp_buf jmpbuf;
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 3b23440fc8..f4ea7449f6 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -1034,7 +1034,7 @@ const struct brw_tracked_state brw_invariant_state = {
 void
 brw_upload_state_base_address(struct brw_context *brw)
 {
-   if (brw->batch.state_base_address_emitted)
+   if (brw->batch.flags & BATCH_HAS_STATE_BASE)
       return;
 
    /* FINISHME: According to section 3.6.1 "STATE_BASE_ADDRESS" of
@@ -1172,5 +1172,5 @@ brw_upload_state_base_address(struct brw_context *brw)
     */
 
    brw->ctx.NewDriverState |= BRW_NEW_STATE_BASE_ADDRESS;
-   brw->batch.state_base_address_emitted = true;
+   brw->batch.flags |= BATCH_HAS_STATE_BASE;
 }
diff --git a/src/mesa/drivers/dri/i965/brw_program_cache.c b/src/mesa/drivers/dri/i965/brw_program_cache.c
index b4aa62823e..db372a2c65 100644
--- a/src/mesa/drivers/dri/i965/brw_program_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_program_cache.c
@@ -198,7 +198,7 @@ brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size)
     * that depend on it (state base address on gen5+, or unit state before).
     */
    brw->ctx.NewDriverState |= BRW_NEW_PROGRAM_CACHE;
-   brw->batch.state_base_address_emitted = false;
+   brw->batch.flags &= ~BATCH_HAS_STATE_BASE;
 }
 
 /**
diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c
index b4c6fcc67c..0df5c8005d 100644
--- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
@@ -498,7 +498,7 @@ gen7_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
       brw_obj->zero_offsets = true;
    } else if (!brw->has_pipelined_so) {
       brw_batch_flush(&brw->batch, PERF_DEBUG(brw, "BeginTransformFeedback"));
-      brw->batch.needs_sol_reset = true;
+      brw->batch.flags |= BATCH_HAS_SOL;
    }
 
    /* We're about to lose the information needed to compute the number of
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 7b2919f685..86a9792e66 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -90,8 +90,7 @@ intel_batchbuffer_reset(struct brw_batch *batch, bool has_llc)
 
    batch->reserved_space = BATCH_RESERVED;
    batch->state_batch_offset = batch->bo->size;
-   batch->needs_sol_reset = false;
-   batch->state_base_address_emitted = false;
+   batch->flags = 0;
 
    /* We don't know what ring the new batch will be sent to until we see the
     * first BEGIN_BATCH or BEGIN_BATCH_BLT.  Mark it as unknown.
@@ -278,7 +277,7 @@ do_flush_locked(struct brw_context *brw)
          flags = I915_EXEC_RENDER |
             (brw->use_resource_streamer ? I915_EXEC_RESOURCE_STREAMER : 0);
       }
-      if (batch->needs_sol_reset)
+      if (batch->flags & BATCH_HAS_SOL)
 	 flags |= I915_EXEC_GEN7_SOL_RESET;
 
       if (ret == 0) {
-- 
2.11.0



More information about the mesa-dev mailing list