[Mesa-dev] [PATCH] radeonsi: num_records is in units of stride for swizzled buffers even on VI

[Marek Olšák]

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Tue, Jan 10, 2017 at 3:58 PM, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
> From: Nicolai Hähnle <nicolai.haehnle at amd.com>
>
> The old setting didn't hurt, but this is cleaner.
> ---
>  src/gallium/drivers/radeonsi/si_shader.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index 8dec55c..a1d300e 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -5865,22 +5865,20 @@ static void preload_ring_buffers(struct si_shader_context *ctx)
>                         num_components = sel->info.num_stream_output_components[stream];
>                         if (!num_components)
>                                 continue;
>
>                         stride = 4 * num_components * sel->gs_max_out_vertices;
>
>                         /* Limit on the stride field for <= CIK. */
>                         assert(stride < (1 << 14));
>
>                         num_records = 64;
> -                       if (ctx->screen->b.chip_class >= VI)
> -                               num_records *= stride;
>
>                         ring = LLVMBuildBitCast(builder, base_ring, v2i64, "");
>                         tmp = LLVMBuildExtractElement(builder, ring, uint->zero, "");
>                         tmp = LLVMBuildAdd(builder, tmp,
>                                            LLVMConstInt(ctx->i64,
>                                                         stream_offset, 0), "");
>                         stream_offset += stride * 64;
>
>                         ring = LLVMBuildInsertElement(builder, ring, tmp, uint->zero, "");
>                         ring = LLVMBuildBitCast(builder, ring, ctx->v4i32, "");
> --
> 2.7.4
>
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